nand/davinci: make sure ECC calculation has really started

Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.

See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 4ca738e45175fd7556b80f638a6645bb69321f1e..c5a86d6c0d3f6d8cccbd3efd92c191885b1f0f77 100644 (file)
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -484,7 +484,20 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
        __raw_writel(1 << 13, &davinci_emif_regs->nandfcr);
 
        /*
-        * Wait for the corr_state field (bits 8 to 11)in the
+        * Wait for the corr_state field (bits 8 to 11) in the
+        * NAND Flash Status register to be not equal to 0x0, 0x1, 0x2, or 0x3.
+        * Otherwise ECC calculation has not even begun and the next loop might
+        * fail because of a false positive!
+        */
+       i = NAND_TIMEOUT;
+       do {
+               val = __raw_readl(&davinci_emif_regs->nandfsr);
+               val &= 0xc00;
+               i--;
+       } while ((i > 0) && !val);
+
+       /*
+        * Wait for the corr_state field (bits 8 to 11) in the
         * NAND Flash Status register to be equal to 0x0, 0x1, 0x2, or 0x3.
         */
        i = NAND_TIMEOUT;