powerpc/mpc85xx: Add workaround for erratum A006379

Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default
value after POR. The workaround is to set this field before enabling
CPC to 0x1e.

Erratum A006379 applies to
	T4240 rev 1.0
	B4860 rev 1.0, 2.0

Signed-off-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index c441bd2f54a3d9447c54458dd7058b85d9cf1aff..1e5a43f0e0226463420f4eaa461f666972b27373 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <command.h>
 #include <linux/compiler.h>
+#include <asm/fsl_errata.h>
 #include <asm/processor.h>
 #include "fsl_corenet_serdes.h"
 
@@ -245,6 +246,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_SYS_FSL_ERRATUM_A006593
        puts("Work-around for Erratum A006593 enabled\n");
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
+       if (has_erratum_a006379())
+               puts("Work-around for Erratum A006379 enabled\n");
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
        if (IS_SVR_REV(svr, 1, 0))
                puts("Work-around for Erratum A003571 enabled\n");

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index a8107a9c0866597980eced970d2f75b93b16e414..b31efb761041d985464c7f371ac7195884e8672c 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -19,6 +19,7 @@
 #include <asm/io.h>
 #include <asm/cache.h>
 #include <asm/mmu.h>
+#include <asm/fsl_errata.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_srio.h>
@@ -160,6 +161,12 @@ static void enable_cpc(void)
 #ifdef CONFIG_SYS_FSL_ERRATUM_A006593
                setbits_be32(&cpc->cpchdbcr0, 1 << (31 - 21));
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
+               if (has_erratum_a006379()) {
+                       setbits_be32(&cpc->cpchdbcr0,
+                                    CPC_HDBCR0_SPLRU_LEVEL_EN);
+               }
+#endif
 
                out_be32(&cpc->cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE);
                /* Read back to sync write */

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index b51d383799a72448c08f42026d1a9d36ddcdcfd2..946ea975b67c28a3612a99ca893e2ff06e7e14da 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -599,6 +599,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A004468
 #define CONFIG_SYS_FSL_ERRATUM_A_004934
 #define CONFIG_SYS_FSL_ERRATUM_A005871
+#define CONFIG_SYS_FSL_ERRATUM_A006379
 #define CONFIG_SYS_FSL_ERRATUM_A006593
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xfe000000
 #define CONFIG_SYS_FSL_PCI_VER_3_X
@@ -624,6 +625,7 @@
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 #define CONFIG_SYS_FSL_ERRATUM_A_004934
 #define CONFIG_SYS_FSL_ERRATUM_A005871
+#define CONFIG_SYS_FSL_ERRATUM_A006379
 #define CONFIG_SYS_FSL_ERRATUM_A006593
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xfe000000
 

diff --git a/arch/powerpc/include/asm/fsl_errata.h b/arch/powerpc/include/asm/fsl_errata.h
new file mode 100644 (file)
index 0000000..3cac2d4
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_errata.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _ASM_FSL_ERRATA_H
+#define _ASM_FSL_ERRATA_H
+
+#include <common.h>
+#include <asm/processor.h>
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
+static inline bool has_erratum_a006379(void)
+{
+       u32 svr = get_svr();
+       if (((SVR_SOC_VER(svr) == SVR_T4240) && SVR_MAJ(svr) <= 1) ||
+           ((SVR_SOC_VER(svr) == SVR_B4860) && SVR_MAJ(svr) <= 2))
+               return true;
+
+       return false;
+}
+#endif
+
+#endif

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 00f17b6f5e1538bbeb85703c1ba68e2655404aad..e516e0731ad3ad2da378e8fcad7abcd3fff2e52b 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1671,6 +1671,7 @@ typedef struct cpc_corenet {
 #define CPC_HDBCR0_CDQ_SPEC_DIS        0x08000000
 #define CPC_HDBCR0_TAG_ECC_SCRUB_DIS   0x01000000
 #define CPC_HDBCR0_DATA_ECC_SCRUB_DIS  0x00400000
+#define CPC_HDBCR0_SPLRU_LEVEL_EN      0x003c0000
 #endif /* CONFIG_SYS_FSL_CPC */
 
 /* Global Utilities Block */