config TARGET_MPC8610HPCD
bool "Support MPC8610HPCD"
+ select ARCH_MPC8610
config TARGET_MPC8641HPCN
bool "Support MPC8641HPCN"
endchoice
+config ARCH_MPC8610
+ bool
+
source "board/freescale/mpc8610hpcd/Kconfig"
source "board/freescale/mpc8641hpcn/Kconfig"
source "board/sbc8641d/Kconfig"
obj-$(CONFIG_OF_LIBFDT) += fdt.o
obj-y += interrupts.o
obj-$(CONFIG_MP) += mp.o
-obj-$(CONFIG_MPC8610) += mpc8610_serdes.o
+obj-$(CONFIG_ARCH_MPC8610) += mpc8610_serdes.o
obj-$(CONFIG_MPC8641) += mpc8641_serdes.o
obj-y += speed.o
puts("L2: ");
if (get_l2cr() & 0x80000000) {
-#if defined(CONFIG_MPC8610)
+#if defined(CONFIG_ARCH_MPC8610)
puts("256");
#elif defined(CONFIG_MPC8641)
puts("512");
void
watchdog_reset(void)
{
-#if defined(CONFIG_MPC8610)
+#if defined(CONFIG_ARCH_MPC8610)
/*
* This actually feed the hard enabled watchdog.
*/
* for that SOC. This information is taken from application note
* AN2919.
*/
-#ifdef CONFIG_MPC8610
+#ifdef CONFIG_ARCH_MPC8610
gd->arch.i2c1_clk = sys_info.freq_systembus;
#else
gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
/* SoC specific defines for Freescale MPC86xx processors */
-#if defined(CONFIG_MPC8610)
+#if defined(CONFIG_ARCH_MPC8610)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 10
#define CONFIG_SYS_MPC86xx_PCI1_OFFSET 0x8000
-#ifdef CONFIG_MPC8610
+#ifdef CONFIG_ARCH_MPC8610
#define CONFIG_SYS_MPC86xx_PCIE1_OFFSET 0xa000
#else
#define CONFIG_SYS_MPC86xx_PCIE1_OFFSET 0x8000
#define __CONFIG_H
/* High Level Configuration Options */
-#define CONFIG_MPC8610 1 /* MPC8610 specific */
#define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
CONFIG_MPC85XX_PCI2
CONFIG_MPC860
CONFIG_MPC860T
-CONFIG_MPC8610
CONFIG_MPC8610HPCD
CONFIG_MPC862
CONFIG_MPC8641