fsl-diu: Using I/O accessor to CCSR space

Using PPC I/O accessor to DIU I/O space instead of directly
read/write. It will prevent the dozen of compiler order issue
and PPC hardware order issue for accessing I/O space.

Using the toolchain(tc-fsl-x86lnx-e500-dp-4.3.74-2.i386.rpm)
can show up the order issue of DIU driver.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
index cbee8fe09353aebd1aec34e72a081ac808372451..e7f077e0f7e6c8b2033b148402190e88975c5ef6 100644 (file)
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007 Freescale Semiconductor, Inc.
+ * Copyright 2007, 2010 Freescale Semiconductor, Inc.
  * York Sun <yorksun@freescale.com>
  *
  * FSL DIU Framebuffer driver
@@ -26,6 +26,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <malloc.h>
+#include <asm/io.h>
 
 #include "fsl_diu_fb.h"
 
@@ -267,9 +268,9 @@ int fsl_diu_init(int xres,
 
        memset(info->screen_base, 0, info->smem_len);
 
-       dr.diu_reg->desc[0] = (unsigned int) &dummy_ad;
-       dr.diu_reg->desc[1] = (unsigned int) &dummy_ad;
-       dr.diu_reg->desc[2] = (unsigned int) &dummy_ad;
+       out_be32(&dr.diu_reg->desc[0], &dummy_ad);
+       out_be32(&dr.diu_reg->desc[1], &dummy_ad);
+       out_be32(&dr.diu_reg->desc[2], &dummy_ad);
        debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
        debug("dummy desc[0] = 0x%x\n", hw->desc[0]);
 
@@ -331,26 +332,26 @@ int fsl_diu_init(int xres,
 
        /* Program DIU registers */
 
-       hw->gamma = (unsigned int) gamma.paddr;
-       hw->cursor= (unsigned int) cursor.paddr;
-       hw->bgnd = 0x007F7F7F;                          /* BGND */
-       hw->bgnd_wb = 0;                                /* BGND_WB */
-       hw->disp_size = var->yres << 16 | var->xres;    /* DISP SIZE */
-       hw->wb_size = 0;                                /* WB SIZE */
-       hw->wb_mem_addr = 0;                            /* WB MEM ADDR */
-       hw->hsyn_para = var->left_margin << 22 |        /* BP_H */
+       out_be32(&hw->gamma, gamma.paddr);
+       out_be32(&hw->cursor, cursor.paddr);
+       out_be32(&hw->bgnd, 0x007F7F7F);
+       out_be32(&hw->bgnd_wb, 0);                              /* BGND_WB */
+       out_be32(&hw->disp_size, var->yres << 16 | var->xres);  /* DISP SIZE */
+       out_be32(&hw->wb_size, 0);                              /* WB SIZE */
+       out_be32(&hw->wb_mem_addr, 0);                          /* WB MEM ADDR */
+       out_be32(&hw->hsyn_para, var->left_margin << 22 |       /* BP_H */
                        var->hsync_len << 11   |        /* PW_H */
-                       var->right_margin;              /* FP_H */
-       hw->vsyn_para = var->upper_margin << 22 |       /* BP_V */
-                       var->vsync_len << 11    |       /* PW_V  */
-                       var->lower_margin;              /* FP_V  */
+                       var->right_margin);             /* FP_H */
 
-       hw->syn_pol = 0;                        /* SYNC SIGNALS POLARITY */
-       hw->thresholds = 0x00037800;            /* The Thresholds */
-       hw->int_status = 0;                     /* INTERRUPT STATUS */
-       hw->int_mask = 0;                       /* INT MASK */
-       hw->plut = 0x01F5F666;
+       out_be32(&hw->vsyn_para, var->upper_margin << 22 |      /* BP_V */
+                       var->vsync_len << 11    |       /* PW_V  */
+                       var->lower_margin);             /* FP_V  */
 
+       out_be32(&hw->syn_pol, 0);                      /* SYNC SIGNALS POLARITY */
+       out_be32(&hw->thresholds, 0x00037800);          /* The Thresholds */
+       out_be32(&hw->int_status, 0);                   /* INTERRUPT STATUS */
+       out_be32(&hw->int_mask, 0);                     /* INT MASK */
+       out_be32(&hw->plut, 0x01F5F666);
        /* Pixel Clock configuration */
        debug("DIU pixclock in ps - %d\n", var->pixclock);
        diu_set_pixel_clock(var->pixclock);
@@ -390,8 +391,8 @@ static int fsl_diu_enable_panel(struct fb_info *info)
        struct diu_ad *ad = &fsl_diu_fb_ad;
 
        debug("Entered: enable_panel\n");
-       if (hw->desc[0] != (unsigned int)ad)
-               hw->desc[0] = (unsigned int)ad;
+       if (in_be32(&hw->desc[0]) != (u32)ad)
+               out_be32(&hw->desc[0], ad);
        debug("desc[0] = 0x%x\n", hw->desc[0]);
        return 0;
 }
@@ -401,8 +402,8 @@ static int fsl_diu_disable_panel(struct fb_info *info)
        struct diu *hw = dr.diu_reg;
 
        debug("Entered: disable_panel\n");
-       if (hw->desc[0] != (unsigned int)&dummy_ad)
-               hw->desc[0] = (unsigned int)&dummy_ad;
+       if (in_be32(&hw->desc[0]) != (u32)&dummy_ad)
+               out_be32(&hw->desc[0], &dummy_ad);
        return 0;
 }
 
@@ -443,7 +444,7 @@ static void enable_lcdc(void)
 
        debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
        if (!fb_enabled) {
-               hw->diu_mode = dr.mode;
+               out_be32(&hw->diu_mode, dr.mode);
                fb_enabled++;
        }
        debug("diu_mode = %d\n", hw->diu_mode);
@@ -455,7 +456,7 @@ static void disable_lcdc(void)
 
        debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
        if (fb_enabled) {
-               hw->diu_mode = 0;
+               out_be32(&hw->diu_mode, 0);
                fb_enabled = 0;
        }
 }