help
Say Y here to enable PSCI support.
+config ARMV7_PSCI_NR_CPUS
+ int "Maximum supported CPUs for PSCI"
+ depends on ARMV7_NONSEC
+ default 4
+ help
+ The maximum number of CPUs supported in the PSCI firmware.
+ It is no problem to set a larger value than the number of
+ CPUs in the actual hardware implementation.
+
config ARMV7_LPAE
bool "Use LPAE page table format" if EXPERT
depends on CPU_V7
#define CONFIG_S5P_PA_SYSRAM 0x02020000
#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
/* Misc utility code */
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CRC32_VERIFY
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif /* __BCM_EP_BOARD_H */
#include "tegra-common-usb-gadget.h"
#include "tegra-common-post.h"
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* Reserve top 1M for secure RAM */
#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
#define CONFIG_LS102XA
#define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
#define CONFIG_LS102XA
#define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
#define CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
-#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE 0x00900000
#endif
#define CONFIG_SUNXI_USB_PHYS 3
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */
#define CONFIG_SUNXI_USB_PHYS 3
-#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */
#define CONFIG_SUNXI_USB_PHYS 2
#endif
-#ifndef CONFIG_MACH_SUN8I_A83T
-#if defined(CONFIG_MACH_SUN8I_A23)
-#define CONFIG_ARMV7_PSCI_NR_CPUS 2
-#elif defined(CONFIG_MACH_SUN8I_A33)
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
-#elif defined(CONFIG_MACH_SUN8I_H3)
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
-#else
-#error Unsupported sun8i variant
-#endif
-#endif
-
/*
* Include common sunxi configuration where most the settings are
*/
#define __CONFIG_UNIPHIER_COMMON_H__
#define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
#define CONFIG_SYSFLAGS_ADDR 0x1c010030
#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif