8xxx: Fix PCI bus address setup for 36-bit configs

We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.

This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 2aba689664f51880a755d6f2b3defffa160e6892..6f1b1a4c83ccf11dd157a343a6cc92e0321ef40d 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -404,7 +404,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 /* controller 3, direct to uli, tgtid 3, Base address 8000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0x80000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xc0000000
+#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc00000000ull
 #else
 #define CONFIG_SYS_PCIE3_MEM_BUS       0x80000000
@@ -423,7 +423,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 /* controller 2, Slot 2, tgtid 2, Base address 9000 */
 #define CONFIG_SYS_PCIE2_MEM_VIRT      0xa0000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xc0000000
+#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS      0xc20000000ull
 #else
 #define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
@@ -442,7 +442,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 /* controller 1, Slot 1, tgtid 1, Base address a000 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0xc0000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000
+#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xc40000000ull
 #else
 #define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000

diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index d8042fb764a4a24925cede9b3bade14f782ed1bb..035874b31290df8541b4e2f0134732485e6a9eac 100644 (file)
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -335,7 +335,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCI1_MEM_VIRT       0x80000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCI1_MEM_BUS                0xc0000000
+#define CONFIG_SYS_PCI1_MEM_BUS                0xe0000000
 #define CONFIG_SYS_PCI1_MEM_PHYS       0x0000000c00000000ULL
 #else
 #define CONFIG_SYS_PCI1_MEM_BUS                CONFIG_SYS_PCI1_MEM_VIRT

diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index a39ff26a7a2a9d024e6f4be8c1f2b38ae6dfb6c3..84b5686244dde6a0a6f777c2d398ec8aa41d4055 100644 (file)
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -437,7 +437,7 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 /* controller 3, Slot 1, tgtid 3, Base address b000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0x80000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xc0000000
+#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc00000000ull
 #else
 #define CONFIG_SYS_PCIE3_MEM_BUS       0x80000000
@@ -456,7 +456,7 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 #define CONFIG_SYS_PCIE2_MEM_VIRT      0xa0000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xc0000000
+#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS      0xc20000000ull
 #else
 #define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
@@ -475,7 +475,7 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0xc0000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000
+#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xc40000000ull
 #else
 #define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000