Adds header address for PPA to be validated during ESBC phase for
ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It
must be initialized before the PPA.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
default 0x60680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
- default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
+ default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A
+ default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A
default 0x680000 if SYS_LS_PPA_FW_IN_MMC
default 0x680000 if SYS_LS_PPA_FW_IN_NAND
help
* DDR memory map
*/
#ifdef CONFIG_FSL_LSCH3
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_BS_ADDR_DEVICE 0x20600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x20640000
+#else /* NOR BOOT */
#define CONFIG_BS_ADDR_DEVICE 0x580600000
#define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000
+#endif /*ifdef CONFIG_QSPI_BOOT */
#define CONFIG_BS_SIZE 0x00001000
#define CONFIG_BS_HDR_SIZE 0x00004000
#define CONFIG_BS_ADDR_RAM 0xa0600000
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
rtc_enable_32khz_output();
+#ifdef CONFIG_FSL_CAAM
+ sec_init();
+#endif
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
-#ifdef CONFIG_FSL_CAAM
- sec_init();
-#endif
-
return 0;
}
#ifdef CONFIG_FSL_QIXIS
QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN);
#endif
+
+#ifdef CONFIG_FSL_CAAM
+ sec_init();
+#endif
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif