]> git.sur5r.net Git - u-boot/commitdiff
zynqmp: Add support for emulation platform - Veloce
authorMichal Simek <michal.simek@xilinx.com>
Wed, 15 Apr 2015 12:59:19 +0000 (14:59 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 29 Apr 2015 09:19:03 +0000 (11:19 +0200)
Add support for Veloce - zynqmp emulation platform.
Platform doesn't support SDHCI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/cpu/armv8/zynqmp/clk.c
arch/arm/cpu/armv8/zynqmp/cpu.c
arch/arm/include/asm/arch-zynqmp/hardware.h
board/xilinx/zynqmp/zynqmp.c

index 0af619d92fdea7548e4bddf6e97703418882e042..9218586e94a3bf0a26c92af13900856a32144f00 100644 (file)
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
@@ -16,6 +17,8 @@ unsigned long get_uart_clk(int dev_id)
        u32 ver = zynqmp_get_silicon_version();
 
        switch (ver) {
+       case ZYNQMP_CSU_VERSION_VELOCE:
+               return 48000;
        case ZYNQMP_CSU_VERSION_EP108:
                return 25000000;
        }
index 11958fea6f11df6f9b189137aad123f792dea7d2..60d7d20e17c8492557962dc1891ba55bbe4577d3 100644 (file)
@@ -20,6 +20,8 @@ unsigned int zynqmp_get_silicon_version(void)
        gd->cpu_clk = get_tbclk();
 
        switch (gd->cpu_clk) {
+       case 0 ... 1000000:
+               return ZYNQMP_CSU_VERSION_VELOCE;
        case 50000000:
                return ZYNQMP_CSU_VERSION_QEMU;
        }
index 3df3147fc4c3699df6f36e070761b52b0b7e9904..188b5c2144af73058083ed0ac27bac389fdedfa7 100644 (file)
@@ -84,6 +84,7 @@ struct apu_regs {
 /* Board version value */
 #define ZYNQMP_CSU_VERSION_SILICON     0x0
 #define ZYNQMP_CSU_VERSION_EP108       0x1
+#define ZYNQMP_CSU_VERSION_VELOCE      0x2
 #define ZYNQMP_CSU_VERSION_QEMU                0x3
 
 #endif /* _ASM_ARCH_HARDWARE_H */
index 1325bca5e552cdac9da3fd127b4d517932a33425..e38948426d7067b9cd455c44686260f110fe73b1 100644 (file)
@@ -56,14 +56,18 @@ int board_mmc_init(bd_t *bd)
 {
        int ret = 0;
 
+       u32 ver = zynqmp_get_silicon_version();
+
+       if (ver != ZYNQMP_CSU_VERSION_VELOCE) {
 #if defined(CONFIG_ZYNQ_SDHCI)
 # if defined(CONFIG_ZYNQ_SDHCI0)
-       ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
+               ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
 # endif
 # if defined(CONFIG_ZYNQ_SDHCI1)
-       ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
+               ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
 # endif
 #endif
+       }
 
        return ret;
 }