mx6slevk: Provide a proper pad configuration for OTG1_ID pin

Pass the same pad configuration as done in the kernel so that OTG1_ID pin can
properly work in device mode.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index c65f72bb158eaad0bbcdacbdb5249c86f19f7058..7c18c90bce9eb96275fab8ae6cd30fc2fcfd6593 100644 (file)
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -50,6 +50,11 @@ DECLARE_GLOBAL_DATA_PTR;
                      PAD_CTL_DSE_40ohm | PAD_CTL_HYS |         \
                      PAD_CTL_ODE | PAD_CTL_SRE_FAST)
 
+#define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |            \
+                       PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
+                       PAD_CTL_DSE_80ohm | PAD_CTL_HYS |       \
+                       PAD_CTL_SRE_FAST)
+
 #define ETH_PHY_RESET  IMX_GPIO_NR(4, 21)
 
 int dram_init(void)
@@ -285,7 +290,7 @@ static int setup_fec(void)
 static iomux_v3_cfg_t const usb_otg_pads[] = {
        /* OTG1 */
        MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(OTGID_PAD_CTRL),
        /* OTG2 */
        MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
 };