arm: atmel: sama5d3: correct the ID for DBGU and PIT

As the DBGU and PIT has its own ID on sama5d3 SoC, while not share
with SYS ID. So, correct them.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

diff --git a/arch/arm/cpu/armv7/at91/sama5d3_devices.c b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
index 7ebee87f925ea53103a5ed4f44601ee2d80f2fd9..78ecfc882a874dc4fc19567b6c0e8be661783942 100644 (file)
--- a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
+++ b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
@@ -84,7 +84,7 @@ void at91_seriald_hw_init(void)
        at91_set_a_periph(AT91_PIO_PORTB, 30, 0);       /* DRXD */
 
        /* Enable clock */
-       at91_periph_clk_enable(ATMEL_ID_SYS);
+       at91_periph_clk_enable(ATMEL_ID_DBGU);
 }
 
 #if defined(CONFIG_ATMEL_SPI)

diff --git a/arch/arm/cpu/armv7/at91/timer.c b/arch/arm/cpu/armv7/at91/timer.c
index 3808aedc795b6d146bf658aaf1018824e3194f86..e3ebfe0c523c45f781cb5725f7ba001749e95926 100644 (file)
--- a/arch/arm/cpu/armv7/at91/timer.c
+++ b/arch/arm/cpu/armv7/at91/timer.c
@@ -60,7 +60,7 @@ int timer_init(void)
        at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
 
        /* Enable PITC Clock */
-       at91_periph_clk_enable(ATMEL_ID_SYS);
+       at91_periph_clk_enable(ATMEL_ID_PIT);
 
        /* Enable PITC */
        writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);