]> git.sur5r.net Git - u-boot/commitdiff
malta: Set I/O port base early
authorPaul Burton <paul.burton@imgtec.com>
Fri, 29 Jan 2016 13:54:53 +0000 (13:54 +0000)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Mon, 1 Feb 2016 21:13:25 +0000 (22:13 +0100)
Set the I/O port base earlier, from board_early_init_f, in preparation
for it being used by the serial driver.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
board/imgtec/malta/malta.c

index cae4a21c3d867088fbe894896174d6db13dbd697..6f4aebc9c92374af1b466a6b7fe59078d68c2e60 100644 (file)
@@ -146,6 +146,8 @@ int board_early_init_f(void)
                return -1;
        }
 
+       set_io_port_base((ulong)io_base);
+
        /* setup FDC37M817 super I/O controller */
        malta_superio_init(io_base);
 
@@ -179,8 +181,6 @@ void pci_init_board(void)
 
        switch (malta_sys_con()) {
        case SYSCON_GT64120:
-               set_io_port_base(CKSEG1ADDR(MALTA_GT_PCIIO_BASE));
-
                gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE),
                                 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
                                 0x10000000, 0x10000000, 128 * 1024 * 1024,
@@ -189,8 +189,6 @@ void pci_init_board(void)
 
        default:
        case SYSCON_MSC01:
-               set_io_port_base(CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE));
-
                msc01_pci_init((void *)CKSEG1ADDR(MALTA_MSC01_PCI_BASE),
                               0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
                               MALTA_MSC01_PCIMEM_MAP,