]> git.sur5r.net Git - u-boot/commitdiff
fdt: Add another Altera Arria10 clock init compatible
authorMarek Vasut <marex@denx.de>
Sat, 12 May 2018 09:56:10 +0000 (11:56 +0200)
committerMarek Vasut <marex@denx.de>
Fri, 18 May 2018 08:30:45 +0000 (10:30 +0200)
The DT bindings for the Arria10 clock init have changed, add another
compatible to make them work with U-Boot until a proper clock driver
gets written.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
include/fdtdec.h
lib/fdtdec.c

index 5456a17d1a73ccf6f8c27389f6d3b8f5cf3dd657..c15b2a04a7aea5a17148a8608a15fce3bd3aacb9 100644 (file)
@@ -160,6 +160,7 @@ enum fdt_compat_id {
        COMPAT_ALTERA_SOCFPGA_F2SDR2,           /* SoCFPGA fpga2SDRAM2 bridge */
        COMPAT_ALTERA_SOCFPGA_FPGA0,            /* SOCFPGA FPGA manager */
        COMPAT_ALTERA_SOCFPGA_NOC,              /* SOCFPGA Arria 10 NOC */
+       COMPAT_ALTERA_SOCFPGA_CLK_INIT,         /* SOCFPGA Arria 10 clk init */
 
        COMPAT_COUNT,
 };
index 69bf12623e0a4cb19b5bf4f1f266145610e0291d..f4e8dbf699a88cebd7793e87066c319b23b037c3 100644 (file)
@@ -72,6 +72,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
        COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
        COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
        COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
+       COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)