ls102xa: changing a few targets' configurations.

Enable hypervisors utilizing the ARMv7 virtualization extension
on the LS1021A-QDS/TWR boards with the A7 core tile, we add the
required configuration variable.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index ef775cf606ecde0fb96c967ed5adcdba8252e408..0533a8358013a712022ff54e1aea68e31d9af2e8 100644 (file)
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -11,6 +11,8 @@
 
 #define OCRAM_BASE_ADDR                                0x10000000
 #define OCRAM_SIZE                             0x00020000
+#define OCRAM_BASE_S_ADDR                      0x10010000
+#define OCRAM_S_SIZE                           0x00010000
 
 #define CONFIG_SYS_IMMR                                0x01000000
 #define CONFIG_SYS_DCSRBAR                     0x20000000

diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 5abc3a196eb572262d3d9399050c1e87993fb4e0..697d4ca4894b373d51bc7a44ad73b62402935519 100644 (file)
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -17,6 +17,9 @@
 #define SOC_VER_LS1021         0x11
 #define SOC_VER_LS1022         0x12
 
+#define CCSR_BRR_OFFSET                0xe4
+#define CCSR_SCRATCHRW1_OFFSET 0x200
+
 #define RCWSR0_SYS_PLL_RAT_SHIFT       25
 #define RCWSR0_SYS_PLL_RAT_MASK                0x1f
 #define RCWSR0_MEM_PLL_RAT_SHIFT       16

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 536d9f3a58bb0dffeb6413b7229b806e1aa912ba..704c3498402e0cc66baa42b12cdb84aaeebbbb96 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -493,6 +493,13 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMD_IMLS
 #endif
 
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_ARMV7_VIRT
+#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CONFIG_SMP_PEN_ADDR            0x01ee0200
+#define CONFIG_TIMER_CLK_FREQ          12500000
+#define CONFIG_ARMV7_SECURE_BASE       OCRAM_BASE_S_ADDR
+
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128
 

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index a3271fed0599434ef7bd191386bb32b24868d441..809e80f82cdd8bd7205aaa0af348679dd4aaae49 100644 (file)
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -312,6 +312,13 @@
 #define CONFIG_CMD_IMLS
 #endif
 
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_ARMV7_VIRT
+#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CONFIG_SMP_PEN_ADDR            0x01ee0200
+#define CONFIG_TIMER_CLK_FREQ          12500000
+#define CONFIG_ARMV7_SECURE_BASE       OCRAM_BASE_S_ADDR
+
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128