#define COMMAND_RXENABLE      0x00000001
 #define COMMAND_TXENABLE      0x00000002
 #define COMMAND_PASSRUNTFRAME 0x00000040
+#define COMMAND_RMII          0x00000200
 #define COMMAND_FULL_DUPLEX   0x00000400
 /* Helper: general reset */
 #define COMMAND_RESETS        0x00000038
        struct eth_device dev;
        struct lpc32xx_eth_registers *regs;
        struct lpc32xx_eth_buffers *bufs;
+       bool phy_rmii;
 };
 
 #define LPC32XX_ETH_DEVICE_SIZE (sizeof(struct lpc32xx_eth_device))
 
 static struct lpc32xx_eth_device lpc32xx_eth = {
        .regs = (struct lpc32xx_eth_registers *)LPC32XX_ETH_BASE,
-       .bufs = (struct lpc32xx_eth_buffers *)LPC32XX_ETH_BUFS
+       .bufs = (struct lpc32xx_eth_buffers *)LPC32XX_ETH_BUFS,
+#if defined(CONFIG_RMII)
+       .phy_rmii = true,
+#endif
 };
 
 #define TX_TIMEOUT 10000
        writel(0x0012, ®s->ipgr);
 
        /* pass runt (smaller than 64 bytes) frames */
-       writel(COMMAND_PASSRUNTFRAME, ®s->command);
+       if (lpc32xx_eth_device->phy_rmii)
+               writel(COMMAND_PASSRUNTFRAME | COMMAND_RMII, ®s->command);
+       else
+               writel(COMMAND_PASSRUNTFRAME, ®s->command);
 
        /* Configure Full/Half Duplex mode */
        if (miiphy_duplex(dev->name, CONFIG_PHY_ADDR) == FULL) {
 #if defined(CONFIG_PHYLIB)
 int lpc32xx_eth_phylib_init(struct eth_device *dev, int phyid)
 {
+       struct lpc32xx_eth_device *lpc32xx_eth_device =
+               container_of(dev, struct lpc32xx_eth_device, dev);
        struct mii_dev *bus;
        struct phy_device *phydev;
        int ret;
                return -ENOMEM;
        }
 
-       phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_MII);
+       if (lpc32xx_eth_device->phy_rmii)
+               phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RMII);
+       else
+               phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_MII);
+
        if (!phydev) {
                printf("phy_connect failed\n");
                return -ENODEV;