#include <common.h>
#include <pci.h>
#include <asm/fsl_pci.h>
+#include <asm/io.h>
#include <libfdt.h>
#include <fdt_support.h>
immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
#endif
- uint devdisr = gur->devdisr;
- uint io_sel = (gur->pordevsr & MPC8xxx_PORDEVSR_IO_SEL) >>
+ uint devdisr = in_be32(&gur->devdisr);
+ uint io_sel = (in_be32(&gur->pordevsr) & MPC8xxx_PORDEVSR_IO_SEL) >>
MPC8xxx_PORDEVSR_IO_SEL_SHIFT;
- uint host_agent = (gur->porbmsr & MPC8xxx_PORBMSR_HA) >>
+ uint host_agent = (in_be32(&gur->porbmsr) & MPC8xxx_PORBMSR_HA) >>
MPC8xxx_PORBMSR_HA_SHIFT;
struct pci_region *r;
#ifdef CONFIG_PCI1
- uint pci_spd_norm = (gur->pordevsr & MPC85xx_PORDEVSR_PCI1_SPD);
- uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32;
- uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;
- uint pcix = gur->pordevsr & MPC85xx_PORDEVSR_PCI1;
+ uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
+ uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
+ uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
+ uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1;
uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000;
width = 0; /* Silence compiler warning... */
host = host_agent_cfg[host_agent].pci_host[0];
r = hose->regions;
-
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
printf("\n PCI1: %d bit %s, %s %d MHz, %s, %s\n",
pci_32 ? 32 : 64,
pcix ? "PCIX" : "PCI",
- pci_spd_norm ? ">=" : "<=",
+ pci_spd_norm ? ">=" : "<=",
pcix ? freq * 2 : freq,
host ? "host" : "agent",
pci_arb ? "arbiter" : "external-arbiter");
}
#elif defined CONFIG_MPC8548
/* PCI1 not present on MPC8572 */
- gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */
+ setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
#endif
#ifdef CONFIG_PCIE1
pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
printf("\n PCIE1 connected as %s (x%d)",
host ? "Root Complex" : "End Point", width);
- if (pci->pme_msg_det) {
- pci->pme_msg_det = 0xffffffff;
+ if (in_be32(&pci->pme_msg_det)) {
+ out_be32(&pci->pme_msg_det, 0xffffffff);
debug(" with errors. Clearing. Now 0x%08x",
- pci->pme_msg_det);
+ in_be32(&pci->pme_msg_det));
}
printf("\n");
hose->first_busno, hose->last_busno);
}
#else
- gur->devdisr |= MPC8xxx_DEVDISR_PCIE1; /* disable */
+ setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE1);
#endif /* CONFIG_PCIE1 */
#ifdef CONFIG_PCIE2
if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) {
printf("\n PCIE2 connected as %s (x%d)",
host ? "Root Complex" : "End Point", width);
- if (pci->pme_msg_det) {
- pci->pme_msg_det = 0xffffffff;
+ if (in_be32(&pci->pme_msg_det)) {
+ out_be32(&pci->pme_msg_det, 0xffffffff);
debug(" with errors. Clearing. Now 0x%08x",
- pci->pme_msg_det);
+ in_be32(&pci->pme_msg_det));
}
printf("\n");
hose->first_busno, hose->last_busno);
}
#else
- gur->devdisr |= MPC8xxx_DEVDISR_PCIE2; /* disable */
+ setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE2);
#endif /* CONFIG_PCIE2 */
#ifdef CONFIG_PCIE3
if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) {
printf("\n PCIE3 connected as %s (x%d)",
host ? "Root Complex" : "End Point", width);
- if (pci->pme_msg_det) {
- pci->pme_msg_det = 0xffffffff;
+ if (in_be32(&pci->pme_msg_det)) {
+ out_be32(&pci->pme_msg_det, 0xffffffff);
debug(" with errors. Clearing. Now 0x%08x",
- pci->pme_msg_det);
+ in_be32(&pci->pme_msg_det));
}
printf("\n");
hose->first_busno, hose->last_busno);
}
#else
- gur->devdisr |= MPC8xxx_DEVDISR_PCIE3; /* disable */
+ setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE3);
#endif /* CONFIG_PCIE3 */
}
{
volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
-
char *s;
printf("Board: X-ES %s PMC\n", CONFIG_SYS_BOARD_NAME);
printf("Cfg %s", s);
printf("\n");
- lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
- lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */
- ecm->eedr = 0xffffffff; /* Clear ecm errors */
- ecm->eeer = 0xffffffff; /* Enable ecm errors */
+ out_be32(&lbc->ltesr, 0xffffffff); /* Clear LBC error IRQs */
+ out_be32(&lbc->lteir, 0xffffffff); /* Enable LBC error IRQs */
+ out_be32(&ecm->eedr, 0xffffffff); /* Clear ecm errors */
+ out_be32(&ecm->eeer, 0xffffffff); /* Enable ecm errors */
return 0;
}
printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1);
if (flash_sel) {
- lbc->br0 = CONFIG_SYS_BR1_PRELIM;
- lbc->or0 = CONFIG_SYS_OR1_PRELIM;
+ out_be32(&lbc->br0, CONFIG_SYS_BR1_PRELIM);
+ out_be32(&lbc->or0, CONFIG_SYS_OR1_PRELIM);
- lbc->br1 = CONFIG_SYS_BR0_PRELIM;
- lbc->or1 = CONFIG_SYS_OR0_PRELIM;
+ out_be32(&lbc->br1, CONFIG_SYS_BR0_PRELIM);
+ out_be32(&lbc->or1, CONFIG_SYS_OR0_PRELIM);
}
}