Changes since U-Boot 1.0.1:
======================================================================
+* Patch by Reinhard Meyer, 09 Jan 2004:
+ - add RTC support for MPC5200 based boards (requires RTC_XTAL)
+
+* Add support for IDE LED on BMS2003 board
+ (exclusive with status LED!)
+
+* Add support for PS/2 keyboard (used with PS/2 multiplexor on
+ BMS2003 board)
+
+* Patches by Reinhard Meyer, 4 Jan 2004 + 7 Jan 2004:
+ Add common files for "emk" boards
+
* Add a common get_ram_size() function and modify the the
board-specific files to invoke that common implementation.
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/*****************************************************************************
+ * check fiber optic link present, and then copper link present. do auto switch
+ * between both
+ *****************************************************************************/
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2003
+ * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+typedef unsigned char FLASH_PORT_WIDTH;
+typedef volatile unsigned char FLASH_PORT_WIDTHV;
+#define FLASH_ID_MASK 0xFF
+
+#define FPW FLASH_PORT_WIDTH
+#define FPWV FLASH_PORT_WIDTHV
+
+#define FLASH_CYCLE1 0x0aaa
+#define FLASH_CYCLE2 0x0555
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size(FPWV *addr, flash_info_t *info);
+static void flash_reset(flash_info_t *info);
+static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
+static flash_info_t *flash_get_info(ulong base);
+
+/*-----------------------------------------------------------------------
+ * flash_init()
+ *
+ * sets up flash_info and returns size of FLASH (bytes)
+ */
+unsigned long flash_init (void)
+{
+ unsigned long size = 0;
+ int i = 0;
+ extern void flash_preinit(void);
+ extern void flash_afterinit(uint, ulong, ulong);
+ ulong flashbase = CFG_FLASH_BASE;
+
+ flash_preinit();
+
+ /* There is only ONE FLASH device */
+ memset(&flash_info[i], 0, sizeof(flash_info_t));
+ flash_info[i].size =
+ flash_get_size((FPW *)flashbase, &flash_info[i]);
+ size += flash_info[i].size;
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+ /* monitor protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_MONITOR_BASE,
+ CFG_MONITOR_BASE+monitor_flash_len-1,
+ flash_get_info(CFG_MONITOR_BASE));
+#endif
+
+#ifdef CFG_ENV_IS_IN_FLASH
+ /* ENV protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR+CFG_ENV_SIZE-1,
+ flash_get_info(CFG_ENV_ADDR));
+#endif
+
+
+ flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
+ return size ? size : 1;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_reset(flash_info_t *info)
+{
+ FPWV *base = (FPWV *)(info->start[0]);
+
+ /* Put FLASH back in read mode */
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
+ *base = (FPW)0x00FF00FF; /* Intel Read Mode */
+ else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
+ *base = (FPW)0x00F000F0; /* AMD Read Mode */
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+static flash_info_t *flash_get_info(ulong base)
+{
+ int i;
+ flash_info_t * info;
+
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
+ info = & flash_info[i];
+ if (info->size &&
+ info->start[0] <= base && base <= info->start[0] + info->size - 1)
+ break;
+ }
+
+ return i == CFG_MAX_FLASH_BANKS ? 0 : info;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+void flash_print_info (flash_info_t *info)
+{
+ int i;
+ uchar *boottype;
+ uchar *bootletter;
+ uchar *fmt;
+ uchar botbootletter[] = "B";
+ uchar topbootletter[] = "T";
+ uchar botboottype[] = "bottom boot sector";
+ uchar topboottype[] = "top boot sector";
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_AMD: printf ("AMD "); break;
+#if 0
+ case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
+ case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
+ case FLASH_MAN_SST: printf ("SST "); break;
+ case FLASH_MAN_STM: printf ("STM "); break;
+ case FLASH_MAN_INTEL: printf ("INTEL "); break;
+#endif
+ default: printf ("Unknown Vendor "); break;
+ }
+
+ /* check for top or bottom boot, if it applies */
+ if (info->flash_id & FLASH_BTYPE) {
+ boottype = botboottype;
+ bootletter = botbootletter;
+ }
+ else {
+ boottype = topboottype;
+ bootletter = topbootletter;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_AM160T:
+ case FLASH_AM160B:
+ fmt = "29LV160%s (16 Mbit, %s)\n";
+ break;
+ default:
+ fmt = "Unknown Chip Type\n";
+ break;
+ }
+
+ printf (fmt, bootletter, boottype);
+
+ printf (" Size: %ld MB in %d Sectors\n",
+ info->size >> 20,
+ info->sector_count);
+
+ printf (" Sector Start Addresses:");
+
+ for (i=0; i<info->sector_count; ++i) {
+ if ((i % 5) == 0) {
+ printf ("\n ");
+ }
+
+ printf (" %08lX%s", info->start[i],
+ info->protect[i] ? " (RO)" : " ");
+ }
+
+ printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+ulong flash_get_size (FPWV *addr, flash_info_t *info)
+{
+ int i;
+ ulong offset;
+
+ /* Write auto select command: read Manufacturer ID */
+ /* Write auto select command sequence and test FLASH answer */
+ addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
+ addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
+ addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
+
+ /* The manufacturer codes are only 1 byte, so just use 1 byte.
+ * This works for any bus width and any FLASH device width.
+ */
+ udelay(100);
+ switch (addr[0] & 0xff) {
+
+ case (uchar)AMD_MANUFACT:
+ info->flash_id = FLASH_MAN_AMD;
+ break;
+
+#if 0
+ case (uchar)INTEL_MANUFACT:
+ info->flash_id = FLASH_MAN_INTEL;
+ break;
+#endif
+
+ default:
+ printf ("unknown vendor=%x ", addr[0] & 0xff);
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ break;
+ }
+
+ /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
+ if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[2]) {
+
+ case (FPW)AMD_ID_LV160B:
+ info->flash_id += FLASH_AM160B;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+#ifdef CFG_LOWBOOT
+ offset = 0;
+#else
+ offset = 0x00e00000;
+#endif
+ info->start[0] = (ulong)addr + offset;
+ info->start[1] = (ulong)addr + offset + 0x4000;
+ info->start[2] = (ulong)addr + offset + 0x6000;
+ info->start[3] = (ulong)addr + offset + 0x8000;
+ for (i = 4; i < info->sector_count; i++)
+ {
+ info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
+ }
+ break;
+
+ default:
+ printf ("unknown AMD device=%x ", (FPW)addr[2]);
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ return (0); /* => no or unknown flash */
+ }
+
+ /* Put FLASH back in read mode */
+ flash_reset(info);
+
+ return (info->size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+ FPWV *addr;
+ int flag, prot, sect;
+ int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
+ ulong start, now, last;
+ int rcode = 0;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_AM160B:
+ break;
+ case FLASH_UNKNOWN:
+ default:
+ printf ("Can't erase unknown flash type %08lx - aborted\n",
+ info->flash_id);
+ return 1;
+ }
+
+ prot = 0;
+ for (sect=s_first; sect<=s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+ last = get_timer(0);
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
+
+ if (info->protect[sect] != 0) /* protected, skip it */
+ continue;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ addr = (FPWV *)(info->start[sect]);
+ if (intel) {
+ *addr = (FPW)0x00500050; /* clear status register */
+ *addr = (FPW)0x00200020; /* erase setup */
+ *addr = (FPW)0x00D000D0; /* erase confirm */
+ }
+ else {
+ /* must be AMD style if not Intel */
+ FPWV *base; /* first address in bank */
+
+ base = (FPWV *)(info->start[0]);
+ base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
+ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
+ base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
+ base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
+ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
+ *addr = (FPW)0x00300030; /* erase sector */
+ }
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ start = get_timer(0);
+
+ /* wait at least 50us for AMD, 80us for Intel.
+ * Let's wait 1 ms.
+ */
+ udelay (1000);
+
+ while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
+ if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+
+ if (intel) {
+ /* suspend erase */
+ *addr = (FPW)0x00B000B0;
+ }
+
+ flash_reset(info); /* reset to read mode */
+ rcode = 1; /* failed */
+ break;
+ }
+
+ /* show that we're waiting */
+ if ((get_timer(last)) > CFG_HZ) {/* every second */
+ putc ('.');
+ last = get_timer(0);
+ }
+ }
+
+ /* show that we're waiting */
+ if ((get_timer(last)) > CFG_HZ) { /* every second */
+ putc ('.');
+ last = get_timer(0);
+ }
+
+ flash_reset(info); /* reset to read mode */
+ }
+
+ printf (" done\n");
+ return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+ FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
+ int bytes; /* number of bytes to program in current word */
+ int left; /* number of bytes left to program */
+ int i, res;
+
+ for (left = cnt, res = 0;
+ left > 0 && res == 0;
+ addr += sizeof(data), left -= sizeof(data) - bytes) {
+
+ bytes = addr & (sizeof(data) - 1);
+ addr &= ~(sizeof(data) - 1);
+
+ /* combine source and destination data so can program
+ * an entire word of 16 or 32 bits
+ */
+ for (i = 0; i < sizeof(data); i++) {
+ data <<= 8;
+ if (i < bytes || i - bytes >= left )
+ data += *((uchar *)addr + i);
+ else
+ data += *src++;
+ }
+
+ /* write one word to the flash */
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_AMD:
+ res = write_word_amd(info, (FPWV *)addr, data);
+ break;
+ default:
+ /* unknown flash type, error! */
+ printf ("missing or unknown FLASH type\n");
+ res = 1; /* not really a timeout, but gives error */
+ break;
+ }
+ }
+
+ return (res);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash for AMD FLASH
+ * A word is 16 or 32 bits, whichever the bus width of the flash bank
+ * (not an individual chip) is.
+ *
+ * returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
+{
+ ulong start;
+ int flag;
+ int res = 0; /* result, assume success */
+ FPWV *base; /* first address in flash bank */
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*dest & data) != data) {
+ return (2);
+ }
+
+
+ base = (FPWV *)(info->start[0]);
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
+ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
+ base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
+
+ *dest = data; /* start programming the data */
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ start = get_timer (0);
+
+ /* data polling for D7 */
+ while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ *dest = (FPW)0x00F000F0; /* reset bank */
+ res = 1;
+ }
+ }
+
+ return (res);
+}
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/*****************************************************************************
+ * read "factory" part of EEPROM and set some environment variables
+ *****************************************************************************/
+void read_factory_r (void)
+{
+ /* read 'factory' part of EEPROM */
+ uchar buf[81];
+ uchar *p;
+ uint length;
+ uint addr;
+ uint len;
+
+ /* get length first */
+ addr = CFG_FACT_OFFSET;
+ if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) {
+ bailout:
+ printf ("cannot read factory configuration\n");
+ printf ("be sure to set ethaddr yourself!\n");
+ return;
+ }
+ length = buf[0] + (buf[1] << 8);
+ addr += 2;
+
+ /* sanity check */
+ if (length < 20 || length > CFG_FACT_SIZE - 2)
+ goto bailout;
+
+ /* read lines */
+ while (length > 0) {
+ /* read one line */
+ len = length > 80 ? 80 : length;
+ if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))
+ goto bailout;
+ /* mark end of buffer */
+ buf[len] = 0;
+ /* search end of line */
+ for (p = buf; *p && *p != 0x0a; p++);
+ if (!*p)
+ goto bailout;
+ *p++ = 0;
+ /* advance to next line start */
+ length -= p - buf;
+ addr += p - buf;
+ /*printf ("%s\n", buf); */
+ /* search for our specific entry */
+ if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) {
+ setenv ("ethaddr", buf + 19);
+ } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) {
+ setenv ("serial#", buf + 15);
+ } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) {
+ setenv ("board_id", buf + 13);
+ }
+ }
+}
#include <common.h>
#include <mpc8xx.h>
+#ifdef CONFIG_PS2MULT
+#include <ps2mult.h>
+#endif
/* ------------------------------------------------------------------------- */
}
/* ------------------------------------------------------------------------- */
+
+#ifdef CONFIG_PS2MULT
+
+#ifdef CONFIG_BMS2003
+#define BASE_BAUD ( 1843200 / 16 )
+struct serial_state rs_table[] = {
+ { BASE_BAUD, 4, (void*)0xec140000 },
+ { BASE_BAUD, 2, (void*)0xec150000 },
+ { BASE_BAUD, 6, (void*)0xec160000 },
+ { BASE_BAUD, 10, (void*)0xec170000 },
+};
+#endif /* CONFIG_BMS2003 */
+
+#endif /* CONFIG_PS2MULT */
+
+/* ------------------------------------------------------------------------- */
+#ifdef CONFIG_BMS2003
+
+int misc_init_r (void)
+{
+#ifdef CONFIG_IDE_LED
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+
+ /* Configure PA15 as output port */
+ immap->im_ioport.iop_padir |= 0x0001;
+ immap->im_ioport.iop_paodr |= 0x0001;
+ immap->im_ioport.iop_papar &= ~0x0001;
+ immap->im_ioport.iop_padat &= ~0x0001; /* turn it off */
+#endif
+ return (0);
+}
+
+#ifdef CONFIG_IDE_LED
+void ide_led (uchar led, uchar status)
+{
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+
+ /* We have one led for both pcmcia slots */
+ if (status) { /* led on */
+ immap->im_ioport.iop_padat |= 0x0001;
+ } else {
+ immap->im_ioport.iop_padat &= ~0x0001;
+ }
+}
+#endif
+
+#endif /* CONFIG_BMS2003 */
+/* ------------------------------------------------------------------------- */
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_IDE_LED
-#ifndef CONFIG_KUP4K
+#if !defined(CONFIG_KUP4K) && !defined(CONFIG_BMS2003)
static void ide_led (uchar led, uchar status);
#else
extern void ide_led (uchar led, uchar status);
/* ------------------------------------------------------------------------- */
-#if defined(CONFIG_IDE_LED) && !defined(CONFIG_AMIGAONEG3SE) && !defined(CONFIG_KUP4K)
+#if defined(CONFIG_IDE_LED) && !defined(CONFIG_AMIGAONEG3SE) && !defined(CONFIG_KUP4K) && !defined(CONFIG_BMS2003)
static uchar led_buffer = 0; /* Buffer for current LED status */
ns16550.o ns8382x.o ns87308.o \
pci.o pci_auto.o pci_indirect.o \
pcnet.o plb2800_eth.o \
+ ps2ser.o ps2mult.o pc_keyb.o keyboard.o \
rtl8019.o rtl8139.o \
s3c24x0_i2c.o sed13806.o serial.o \
serial_max3100.o \
smc91111.o smiLynxEM.o sym53c8xx.o \
- ti_pci1410a.o tigon3.o w83c553f.o \
- status_led.o
+ status_led.o \
+ ti_pci1410a.o tigon3.o w83c553f.o
## Disabled for now:
## cs8900.o ct69000.o dataflash.o dc2114x.o ds1722.o \
--- /dev/null
+/***********************************************************************
+ *
+ * (C) Copyright 2004
+ * DENX Software Engineering
+ * Wolfgang Denk, wd@denx.de
+ * All rights reserved.
+ *
+ * Keyboard driver
+ *
+ ***********************************************************************/
+
+#include <common.h>
+
+#ifdef CONFIG_PS2KBD
+
+#include <devices.h>
+#include <keyboard.h>
+
+#undef KBG_DEBUG
+
+#ifdef KBG_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+
+#define DEVNAME "kbd"
+
+#define LED_SCR 0x01 /* scroll lock led */
+#define LED_CAP 0x04 /* caps lock led */
+#define LED_NUM 0x02 /* num lock led */
+
+#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
+
+static volatile char kbd_buffer[KBD_BUFFER_LEN];
+static volatile int in_pointer = 0;
+static volatile int out_pointer = 0;
+
+static unsigned char leds = 0;
+static unsigned char num_lock = 0;
+static unsigned char caps_lock = 0;
+static unsigned char scroll_lock = 0;
+static unsigned char shift = 0;
+static unsigned char ctrl = 0;
+static unsigned char alt = 0;
+static unsigned char e0 = 0;
+
+/******************************************************************
+ * Queue handling
+ ******************************************************************/
+
+/* puts character in the queue and sets up the in and out pointer */
+static void kbd_put_queue(char data)
+{
+ if((in_pointer+1)==KBD_BUFFER_LEN) {
+ if(out_pointer==0) {
+ return; /* buffer full */
+ } else{
+ in_pointer=0;
+ }
+ } else {
+ if((in_pointer+1)==out_pointer)
+ return; /* buffer full */
+ in_pointer++;
+ }
+ kbd_buffer[in_pointer]=data;
+ return;
+}
+
+/* test if a character is in the queue */
+static int kbd_testc(void)
+{
+ if(in_pointer==out_pointer)
+ return(0); /* no data */
+ else
+ return(1);
+}
+
+/* gets the character from the queue */
+static int kbd_getc(void)
+{
+ char c;
+ while(in_pointer==out_pointer);
+ if((out_pointer+1)==KBD_BUFFER_LEN)
+ out_pointer=0;
+ else
+ out_pointer++;
+ c=kbd_buffer[out_pointer];
+ return (int)c;
+
+}
+
+/* Simple translation table for the keys */
+
+static unsigned char kbd_plain_xlate[] = {
+ 0xff,0x1b, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=','\b','\t', /* 0x00 - 0x0f */
+ 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']','\r',0xff, 'a', 's', /* 0x10 - 0x1f */
+ 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';','\'', '`',0xff,'\\', 'z', 'x', 'c', 'v', /* 0x20 - 0x2f */
+ 'b', 'n', 'm', ',', '.', '/',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
+ 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
+ '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
+ '\r',0xff,0xff
+ };
+
+static unsigned char kbd_shift_xlate[] = {
+ 0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t', /* 0x00 - 0x0f */
+ 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S', /* 0x10 - 0x1f */
+ 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', '~',0xff, '|', 'Z', 'X', 'C', 'V', /* 0x20 - 0x2f */
+ 'B', 'N', 'M', '<', '>', '?',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
+ 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
+ '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
+ '\r',0xff,0xff
+ };
+
+static unsigned char kbd_ctrl_xlate[] = {
+ 0xff,0x1b, '1',0x00, '3', '4', '5',0x1E, '7', '8', '9', '0',0x1F, '=','\b','\t', /* 0x00 - 0x0f */
+ 0x11,0x17,0x05,0x12,0x14,0x18,0x15,0x09,0x0f,0x10,0x1b,0x1d,'\n',0xff,0x01,0x13, /* 0x10 - 0x1f */
+ 0x04,0x06,0x08,0x09,0x0a,0x0b,0x0c, ';','\'', '~',0x00,0x1c,0x1a,0x18,0x03,0x16, /* 0x20 - 0x2f */
+ 0x02,0x0e,0x0d, '<', '>', '?',0xff,0xff,0xff,0x00,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
+ 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
+ '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
+ '\r',0xff,0xff
+ };
+
+
+void handle_scancode(unsigned char scancode)
+{
+ unsigned char keycode;
+
+ /* Convert scancode to keycode */
+ PRINTF("scancode %x\n",scancode);
+ if(scancode==0xe0) {
+ e0=1; /* special charakters */
+ return;
+ }
+ if(e0==1) {
+ e0=0; /* delete flag */
+ if(!( ((scancode&0x7F)==0x38)|| /* the right ctrl key */
+ ((scancode&0x7F)==0x1D)|| /* the right alt key */
+ ((scancode&0x7F)==0x35)|| /* the right '/' key */
+ ((scancode&0x7F)==0x1C) )) /* the right enter key */
+ /* we swallow unknown e0 codes */
+ return;
+ }
+ /* special cntrl keys */
+ switch(scancode) {
+ case 0x2A:
+ case 0x36: /* shift pressed */
+ shift=1;
+ return; /* do nothing else */
+ case 0xAA:
+ case 0xB6: /* shift released */
+ shift=0;
+ return; /* do nothing else */
+ case 0x38: /* alt pressed */
+ alt=1;
+ return; /* do nothing else */
+ case 0xB8: /* alt released */
+ alt=0;
+ return; /* do nothing else */
+ case 0x1d: /* ctrl pressed */
+ ctrl=1;
+ return; /* do nothing else */
+ case 0x9d: /* ctrl released */
+ ctrl=0;
+ return; /* do nothing else */
+ case 0x46: /* scrollock pressed */
+ scroll_lock=~scroll_lock;
+ if(scroll_lock==0)
+ leds&=~LED_SCR; /* switch LED off */
+ else
+ leds|=LED_SCR; /* switch on LED */
+ pckbd_leds(leds);
+ return; /* do nothing else */
+ case 0x3A: /* capslock pressed */
+ caps_lock=~caps_lock;
+ if(caps_lock==0)
+ leds&=~LED_CAP; /* switch caps_lock off */
+ else
+ leds|=LED_CAP; /* switch on LED */
+ pckbd_leds(leds);
+ return;
+ case 0x45: /* numlock pressed */
+ num_lock=~num_lock;
+ if(num_lock==0)
+ leds&=~LED_NUM; /* switch LED off */
+ else
+ leds|=LED_NUM; /* switch on LED */
+ pckbd_leds(leds);
+ return;
+ case 0xC6: /* scroll lock released */
+ case 0xC5: /* num lock released */
+ case 0xBA: /* caps lock released */
+ return; /* just swallow */
+ }
+ if((scancode&0x80)==0x80) /* key released */
+ return;
+ /* now, decide which table we need */
+ if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
+ PRINTF("unkown scancode %X\n",scancode);
+ return; /* swallow it */
+ }
+ /* setup plain code first */
+ keycode=kbd_plain_xlate[scancode];
+ if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */
+ if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
+ PRINTF("unkown caps-locked scancode %X\n",scancode);
+ return; /* swallow it */
+ }
+ keycode=kbd_shift_xlate[scancode];
+ if(keycode<'A') { /* we only want the alphas capital */
+ keycode=kbd_plain_xlate[scancode];
+ }
+ }
+ if(shift==1) { /* shift overwrites caps_lock */
+ if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
+ PRINTF("unkown shifted scancode %X\n",scancode);
+ return; /* swallow it */
+ }
+ keycode=kbd_shift_xlate[scancode];
+ }
+ if(ctrl==1) { /* ctrl overwrites caps_lock and shift */
+ if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */
+ PRINTF("unkown ctrl scancode %X\n",scancode);
+ return; /* swallow it */
+ }
+ keycode=kbd_ctrl_xlate[scancode];
+ }
+ /* check if valid keycode */
+ if(keycode==0xff) {
+ PRINTF("unkown scancode %X\n",scancode);
+ return; /* swallow unknown codes */
+ }
+
+ kbd_put_queue(keycode);
+ PRINTF("%x\n",keycode);
+}
+
+/******************************************************************
+ * Init
+ ******************************************************************/
+
+#ifdef CFG_CONSOLE_OVERWRITE_ROUTINE
+extern int overwrite_console (void);
+#else
+int overwrite_console (void)
+{
+ return (0);
+}
+#endif
+
+int kbd_init (void)
+{
+ int error;
+ device_t kbddev ;
+ char *stdinname = getenv ("stdin");
+
+ if(kbd_init_hw()==-1)
+ return -1;
+ memset (&kbddev, 0, sizeof(kbddev));
+ strcpy(kbddev.name, DEVNAME);
+ kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
+ kbddev.putc = NULL ;
+ kbddev.puts = NULL ;
+ kbddev.getc = kbd_getc ;
+ kbddev.tstc = kbd_testc ;
+
+ error = device_register (&kbddev);
+ if(error==0) {
+ /* check if this is the standard input device */
+ if(strcmp(stdinname,DEVNAME)==0) {
+ /* reassign the console */
+ if(overwrite_console()) {
+ return 1;
+ }
+ error=console_assign(stdin,DEVNAME);
+ if(error==0)
+ return 1;
+ else
+ return error;
+ }
+ return 1;
+ }
+ return error;
+}
+
+#endif /* CONFIG_PS2KBD */
--- /dev/null
+/***********************************************************************
+ *
+ * (C) Copyright 2004
+ * DENX Software Engineering
+ * Wolfgang Denk, wd@denx.de
+ * All rights reserved.
+ *
+ * PS/2 keyboard driver
+ *
+ * Originally from linux source (drivers/char/pc_keyb.c)
+ *
+ ***********************************************************************/
+
+#include <common.h>
+
+#ifdef CONFIG_PS2KBD
+
+#include <keyboard.h>
+#include <pc_keyb.h>
+
+#undef KBG_DEBUG
+
+#ifdef KBG_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+
+/*
+ * This reads the keyboard status port, and does the
+ * appropriate action.
+ *
+ */
+static unsigned char handle_kbd_event(void)
+{
+ unsigned char status = kbd_read_status();
+ unsigned int work = 10000;
+
+ while ((--work > 0) && (status & KBD_STAT_OBF)) {
+ unsigned char scancode;
+
+ scancode = kbd_read_input();
+
+ /* Error bytes must be ignored to make the
+ Synaptics touchpads compaq use work */
+ /* Ignore error bytes */
+ if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR))) {
+ if (status & KBD_STAT_MOUSE_OBF)
+ ; /* not supported: handle_mouse_event(scancode); */
+ else
+ handle_scancode(scancode);
+ }
+ status = kbd_read_status();
+ }
+ if (!work)
+ PRINTF("pc_keyb: controller jammed (0x%02X).\n", status);
+ return status;
+}
+
+
+static int kbd_read_data(void)
+{
+ int val;
+ unsigned char status;
+
+ val=-1;
+ status = kbd_read_status();
+ if (status & KBD_STAT_OBF) {
+ val = kbd_read_input();
+ if (status & (KBD_STAT_GTO | KBD_STAT_PERR))
+ val = -2;
+ }
+ return val;
+}
+
+static int kbd_wait_for_input(void)
+{
+ unsigned long timeout;
+ int val;
+
+ timeout = KBD_TIMEOUT;
+ val=kbd_read_data();
+ while(val < 0) {
+ if(timeout--==0)
+ return -1;
+ udelay(1000);
+ val=kbd_read_data();
+ }
+ return val;
+}
+
+
+static int kb_wait(void)
+{
+ unsigned long timeout = KBC_TIMEOUT * 10;
+
+ do {
+ unsigned char status = handle_kbd_event();
+ if (!(status & KBD_STAT_IBF))
+ return 0; /* ok */
+ udelay(1000);
+ timeout--;
+ } while (timeout);
+ return 1;
+}
+
+static void kbd_write_command_w(int data)
+{
+ if(kb_wait())
+ PRINTF("timeout in kbd_write_command_w\n");
+ kbd_write_command(data);
+}
+
+static void kbd_write_output_w(int data)
+{
+ if(kb_wait())
+ PRINTF("timeout in kbd_write_output_w\n");
+ kbd_write_output(data);
+}
+
+static void kbd_send_data(unsigned char data)
+{
+ kbd_write_output_w(data);
+ kbd_wait_for_input();
+}
+
+
+static char * kbd_initialize(void)
+{
+ int status;
+
+ /*
+ * Test the keyboard interface.
+ * This seems to be the only way to get it going.
+ * If the test is successful a x55 is placed in the input buffer.
+ */
+ kbd_write_command_w(KBD_CCMD_SELF_TEST);
+ if (kbd_wait_for_input() != 0x55)
+ return "Kbd: failed self test";
+ /*
+ * Perform a keyboard interface test. This causes the controller
+ * to test the keyboard clock and data lines. The results of the
+ * test are placed in the input buffer.
+ */
+ kbd_write_command_w(KBD_CCMD_KBD_TEST);
+ if (kbd_wait_for_input() != 0x00)
+ return "Kbd: interface failed self test";
+ /*
+ * Enable the keyboard by allowing the keyboard clock to run.
+ */
+ kbd_write_command_w(KBD_CCMD_KBD_ENABLE);
+
+ /*
+ * Reset keyboard. If the read times out
+ * then the assumption is that no keyboard is
+ * plugged into the machine.
+ * This defaults the keyboard to scan-code set 2.
+ *
+ * Set up to try again if the keyboard asks for RESEND.
+ */
+ do {
+ kbd_write_output_w(KBD_CMD_RESET);
+ status = kbd_wait_for_input();
+ if (status == KBD_REPLY_ACK)
+ break;
+ if (status != KBD_REPLY_RESEND) {
+ PRINTF("status: %X\n",status);
+ return "Kbd: reset failed, no ACK";
+ }
+ } while (1);
+ if (kbd_wait_for_input() != KBD_REPLY_POR)
+ return "Kbd: reset failed, no POR";
+
+ /*
+ * Set keyboard controller mode. During this, the keyboard should be
+ * in the disabled state.
+ *
+ * Set up to try again if the keyboard asks for RESEND.
+ */
+ do {
+ kbd_write_output_w(KBD_CMD_DISABLE);
+ status = kbd_wait_for_input();
+ if (status == KBD_REPLY_ACK)
+ break;
+ if (status != KBD_REPLY_RESEND)
+ return "Kbd: disable keyboard: no ACK";
+ } while (1);
+
+ kbd_write_command_w(KBD_CCMD_WRITE_MODE);
+ kbd_write_output_w(KBD_MODE_KBD_INT
+ | KBD_MODE_SYS
+ | KBD_MODE_DISABLE_MOUSE
+ | KBD_MODE_KCC);
+
+ /* ibm powerpc portables need this to use scan-code set 1 -- Cort */
+ kbd_write_command_w(KBD_CCMD_READ_MODE);
+ if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
+ /*
+ * If the controller does not support conversion,
+ * Set the keyboard to scan-code set 1.
+ */
+ kbd_write_output_w(0xF0);
+ kbd_wait_for_input();
+ kbd_write_output_w(0x01);
+ kbd_wait_for_input();
+ }
+ kbd_write_output_w(KBD_CMD_ENABLE);
+ if (kbd_wait_for_input() != KBD_REPLY_ACK)
+ return "Kbd: enable keyboard: no ACK";
+
+ /*
+ * Finally, set the typematic rate to maximum.
+ */
+ kbd_write_output_w(KBD_CMD_SET_RATE);
+ if (kbd_wait_for_input() != KBD_REPLY_ACK)
+ return "Kbd: Set rate: no ACK";
+ kbd_write_output_w(0x00);
+ if (kbd_wait_for_input() != KBD_REPLY_ACK)
+ return "Kbd: Set rate: no ACK";
+ return NULL;
+}
+
+static void kbd_interrupt(void *dev_id)
+{
+ handle_kbd_event();
+}
+
+/******************************************************************
+ * Init
+ ******************************************************************/
+
+int kbd_init_hw(void)
+{
+ char* result;
+
+ kbd_request_region();
+
+ result=kbd_initialize();
+ if (result==NULL) {
+ PRINTF("AT Keyboard initialized\n");
+ kbd_request_irq(kbd_interrupt);
+ return (1);
+ } else {
+ printf("%s\n",result);
+ return (-1);
+ }
+}
+
+void pckbd_leds(unsigned char leds)
+{
+ kbd_send_data(KBD_CMD_SET_LEDS);
+ kbd_send_data(leds);
+}
+
+#endif /* CONFIG_PS2KBD */
--- /dev/null
+/***********************************************************************
+ *
+ * (C) Copyright 2004
+ * DENX Software Engineering
+ * Wolfgang Denk, wd@denx.de
+ * All rights reserved.
+ *
+ * PS/2 multiplexer driver
+ *
+ * Originally from linux source (drivers/char/ps2mult.c)
+ *
+ * Uses simple serial driver (ps2ser.c) to access the multiplexer
+ * Used by PS/2 keyboard driver (pc_keyb.c)
+ *
+ ***********************************************************************/
+
+#include <common.h>
+
+#ifdef CONFIG_PS2MULT
+
+#include <pc_keyb.h>
+#include <asm/atomic.h>
+#include <ps2mult.h>
+
+/* #define DEBUG_MULT */
+/* #define DEBUG_KEYB */
+
+#define KBD_STAT_DEFAULT (KBD_STAT_SELFTEST | KBD_STAT_UNLOCKED)
+
+#define PRINTF(format, args...) printf("ps2mult.c: " format, ## args)
+
+#ifdef DEBUG_MULT
+#define PRINTF_MULT(format, args...) printf("PS2MULT: " format, ## args)
+#else
+#define PRINTF_MULT(format, args...)
+#endif
+
+#ifdef DEBUG_KEYB
+#define PRINTF_KEYB(format, args...) printf("KEYB: " format, ## args)
+#else
+#define PRINTF_KEYB(format, args...)
+#endif
+
+
+static int init_done = 0;
+
+static int received_escape = 0;
+static int received_bsync = 0;
+static int received_selector = 0;
+
+static int kbd_command_active = 0;
+static int mouse_command_active = 0;
+static int ctl_command_active = 0;
+
+static u_char command_byte = 0;
+
+static void (*keyb_handler)(void *dev_id);
+
+static u_char ps2mult_buf [PS2BUF_SIZE];
+static atomic_t ps2mult_buf_cnt;
+static int ps2mult_buf_in_idx;
+static int ps2mult_buf_out_idx;
+
+static u_char ps2mult_buf_status [PS2BUF_SIZE];
+
+
+static void ps2mult_send_byte(u_char byte, u_char sel)
+{
+ ps2ser_putc(sel);
+
+ if (sel == PS2MULT_KB_SELECTOR) {
+ PRINTF_MULT("0x%02x send KEYBOARD\n", byte);
+ kbd_command_active = 1;
+ } else {
+ PRINTF_MULT("0x%02x send MOUSE\n", byte);
+ mouse_command_active = 1;
+ }
+
+ switch (byte) {
+ case PS2MULT_ESCAPE:
+ case PS2MULT_BSYNC:
+ case PS2MULT_KB_SELECTOR:
+ case PS2MULT_MS_SELECTOR:
+ case PS2MULT_SESSION_START:
+ case PS2MULT_SESSION_END:
+ ps2ser_putc(PS2MULT_ESCAPE);
+ break;
+ default:
+ break;
+ }
+
+ ps2ser_putc(byte);
+}
+
+static void ps2mult_receive_byte(u_char byte, u_char sel)
+{
+ u_char status = KBD_STAT_DEFAULT;
+
+#if 1 /* Ignore mouse in U-Boot */
+ if (sel == PS2MULT_MS_SELECTOR) return;
+#endif
+
+ if (sel == PS2MULT_KB_SELECTOR) {
+ if (kbd_command_active) {
+ if (!received_bsync) {
+ PRINTF_MULT("0x%02x lost KEYBOARD !!!\n", byte);
+ return;
+ } else {
+ kbd_command_active = 0;
+ received_bsync = 0;
+ }
+ }
+ PRINTF_MULT("0x%02x receive KEYBOARD\n", byte);
+ status |= KBD_STAT_IBF | KBD_STAT_OBF;
+ } else {
+ if (mouse_command_active) {
+ if (!received_bsync) {
+ PRINTF_MULT("0x%02x lost MOUSE !!!\n", byte);
+ return;
+ } else {
+ mouse_command_active = 0;
+ received_bsync = 0;
+ }
+ }
+ PRINTF_MULT("0x%02x receive MOUSE\n", byte);
+ status |= KBD_STAT_IBF | KBD_STAT_OBF | KBD_STAT_MOUSE_OBF;
+ }
+
+ if (atomic_read(&ps2mult_buf_cnt) < PS2BUF_SIZE) {
+ ps2mult_buf_status[ps2mult_buf_in_idx] = status;
+ ps2mult_buf[ps2mult_buf_in_idx++] = byte;
+ ps2mult_buf_in_idx &= (PS2BUF_SIZE - 1);
+ atomic_inc(&ps2mult_buf_cnt);
+ } else {
+ PRINTF("buffer overflow\n");
+ }
+
+ if (received_bsync) {
+ PRINTF("unexpected BSYNC\n");
+ received_bsync = 0;
+ }
+}
+
+void ps2mult_callback (int in_cnt)
+{
+ int i;
+ u_char byte;
+ static int keyb_handler_active = 0;
+
+ if (!init_done) {
+ return;
+ }
+
+ for (i = 0; i < in_cnt; i ++) {
+ byte = ps2ser_getc();
+
+ if (received_escape) {
+ ps2mult_receive_byte(byte, received_selector);
+ received_escape = 0;
+ } else switch (byte) {
+ case PS2MULT_ESCAPE:
+ PRINTF_MULT("ESCAPE receive\n");
+ received_escape = 1;
+ break;
+
+ case PS2MULT_BSYNC:
+ PRINTF_MULT("BSYNC receive\n");
+ received_bsync = 1;
+ break;
+
+ case PS2MULT_KB_SELECTOR:
+ case PS2MULT_MS_SELECTOR:
+ PRINTF_MULT("%s receive\n",
+ byte == PS2MULT_KB_SELECTOR ? "KB_SEL" : "MS_SEL");
+ received_selector = byte;
+ break;
+
+ case PS2MULT_SESSION_START:
+ case PS2MULT_SESSION_END:
+ PRINTF_MULT("%s receive\n",
+ byte == PS2MULT_SESSION_START ?
+ "SESSION_START" : "SESSION_END");
+ break;
+
+ default:
+ ps2mult_receive_byte(byte, received_selector);
+ }
+ }
+
+ if (keyb_handler && !keyb_handler_active &&
+ atomic_read(&ps2mult_buf_cnt)) {
+ keyb_handler_active = 1;
+ keyb_handler(NULL);
+ keyb_handler_active = 0;
+ }
+}
+
+u_char ps2mult_read_status(void)
+{
+ u_char byte;
+
+ if (atomic_read(&ps2mult_buf_cnt) == 0) {
+ ps2ser_check();
+ }
+
+ if (atomic_read(&ps2mult_buf_cnt)) {
+ byte = ps2mult_buf_status[ps2mult_buf_out_idx];
+ } else {
+ byte = KBD_STAT_DEFAULT;
+ }
+ PRINTF_KEYB("read_status()=0x%02x\n", byte);
+ return byte;
+}
+
+u_char ps2mult_read_input(void)
+{
+ u_char byte = 0;
+
+ if (atomic_read(&ps2mult_buf_cnt) == 0) {
+ ps2ser_check();
+ }
+
+ if (atomic_read(&ps2mult_buf_cnt)) {
+ byte = ps2mult_buf[ps2mult_buf_out_idx++];
+ ps2mult_buf_out_idx &= (PS2BUF_SIZE - 1);
+ atomic_dec(&ps2mult_buf_cnt);
+ }
+ PRINTF_KEYB("read_input()=0x%02x\n", byte);
+ return byte;
+}
+
+void ps2mult_write_output(u_char val)
+{
+ int i;
+
+ PRINTF_KEYB("write_output(0x%02x)\n", val);
+
+ for (i = 0; i < KBD_TIMEOUT; i++) {
+ if (!kbd_command_active && !mouse_command_active) {
+ break;
+ }
+ udelay(1000);
+ ps2ser_check();
+ }
+
+ if (kbd_command_active) {
+ PRINTF("keyboard command not acknoledged\n");
+ kbd_command_active = 0;
+ }
+
+ if (mouse_command_active) {
+ PRINTF("mouse command not acknoledged\n");
+ mouse_command_active = 0;
+ }
+
+ if (ctl_command_active) {
+ switch (ctl_command_active) {
+ case KBD_CCMD_WRITE_MODE:
+ /* Scan code conversion not supported */
+ command_byte = val & ~KBD_MODE_KCC;
+ break;
+
+ case KBD_CCMD_WRITE_AUX_OBUF:
+ ps2mult_receive_byte(val, PS2MULT_MS_SELECTOR);
+ break;
+
+ case KBD_CCMD_WRITE_MOUSE:
+ ps2mult_send_byte(val, PS2MULT_MS_SELECTOR);
+ break;
+
+ default:
+ PRINTF("invalid controller command\n");
+ break;
+ }
+
+ ctl_command_active = 0;
+ return;
+ }
+
+ ps2mult_send_byte(val, PS2MULT_KB_SELECTOR);
+}
+
+void ps2mult_write_command(u_char val)
+{
+ ctl_command_active = 0;
+
+ PRINTF_KEYB("write_command(0x%02x)\n", val);
+
+ switch (val) {
+ case KBD_CCMD_READ_MODE:
+ ps2mult_receive_byte(command_byte, PS2MULT_KB_SELECTOR);
+ break;
+
+ case KBD_CCMD_WRITE_MODE:
+ ctl_command_active = val;
+ break;
+
+ case KBD_CCMD_MOUSE_DISABLE:
+ break;
+
+ case KBD_CCMD_MOUSE_ENABLE:
+ break;
+
+ case KBD_CCMD_SELF_TEST:
+ ps2mult_receive_byte(0x55, PS2MULT_KB_SELECTOR);
+ break;
+
+ case KBD_CCMD_KBD_TEST:
+ ps2mult_receive_byte(0x00, PS2MULT_KB_SELECTOR);
+ break;
+
+ case KBD_CCMD_KBD_DISABLE:
+ break;
+
+ case KBD_CCMD_KBD_ENABLE:
+ break;
+
+ case KBD_CCMD_WRITE_AUX_OBUF:
+ ctl_command_active = val;
+ break;
+
+ case KBD_CCMD_WRITE_MOUSE:
+ ctl_command_active = val;
+ break;
+
+ default:
+ PRINTF("invalid controller command\n");
+ break;
+ }
+}
+
+static int ps2mult_getc_w (void)
+{
+ int res = -1;
+ int i;
+
+ for (i = 0; i < KBD_TIMEOUT; i++) {
+ if (ps2ser_check()) {
+ res = ps2ser_getc();
+ break;
+ }
+ udelay(1000);
+ }
+
+ switch (res) {
+ case PS2MULT_KB_SELECTOR:
+ case PS2MULT_MS_SELECTOR:
+ received_selector = res;
+ break;
+ default:
+ break;
+ }
+
+ return res;
+}
+
+int ps2mult_init (void)
+{
+ int byte;
+ int kbd_found = 0;
+ int mouse_found = 0;
+
+ ps2ser_init();
+
+ ps2ser_putc(PS2MULT_SESSION_START);
+
+ ps2ser_putc(PS2MULT_KB_SELECTOR);
+ ps2ser_putc(KBD_CMD_RESET);
+
+ do {
+ byte = ps2mult_getc_w();
+ } while (byte >= 0 && byte != KBD_REPLY_ACK);
+
+ if (byte == KBD_REPLY_ACK) {
+ byte = ps2mult_getc_w();
+ if (byte == 0xaa) {
+ kbd_found = 1;
+ puts("keyboard");
+ }
+ }
+
+ if (!kbd_found) {
+ while (byte >= 0) {
+ byte = ps2mult_getc_w();
+ }
+ }
+
+#if 1 /* detect mouse */
+ ps2ser_putc(PS2MULT_MS_SELECTOR);
+ ps2ser_putc(AUX_RESET);
+
+ do {
+ byte = ps2mult_getc_w();
+ } while (byte >= 0 && byte != AUX_ACK);
+
+ if (byte == AUX_ACK) {
+ byte = ps2mult_getc_w();
+ if (byte == 0xaa) {
+ byte = ps2mult_getc_w();
+ if (byte == 0x00) {
+ mouse_found = 1;
+ puts(", mouse");
+ }
+ }
+ }
+
+ if (!mouse_found) {
+ while (byte >= 0) {
+ byte = ps2mult_getc_w();
+ }
+ }
+#endif
+
+ if (mouse_found || kbd_found) {
+ if (!received_selector) {
+ if (mouse_found) {
+ received_selector = PS2MULT_MS_SELECTOR;
+ } else {
+ received_selector = PS2MULT_KB_SELECTOR;
+ }
+ }
+
+ init_done = 1;
+ } else {
+ puts("No device found");
+ }
+
+ puts("\n");
+
+#if 0 /* for testing */
+ {
+ int i;
+ u_char key[] = {
+ 0x1f, 0x12, 0x14, 0x12, 0x31, 0x2f, 0x39, /* setenv */
+ 0x1f, 0x14, 0x20, 0x17, 0x31, 0x39, /* stdin */
+ 0x1f, 0x12, 0x13, 0x17, 0x1e, 0x26, 0x1c, /* serial */
+ };
+
+ for (i = 0; i < sizeof (key); i++) {
+ ps2mult_receive_byte (key[i], PS2MULT_KB_SELECTOR);
+ ps2mult_receive_byte (key[i] | 0x80, PS2MULT_KB_SELECTOR);
+ }
+ }
+#endif
+
+ return init_done ? 0 : -1;
+}
+
+int ps2mult_request_irq(void (*handler)(void *))
+{
+ keyb_handler = handler;
+
+ return 0;
+}
+
+#endif /* CONFIG_PS2MULT */
--- /dev/null
+/***********************************************************************
+ *
+ * (C) Copyright 2004
+ * DENX Software Engineering
+ * Wolfgang Denk, wd@denx.de
+ * All rights reserved.
+ *
+ * Simple 16550A serial driver
+ *
+ * Originally from linux source (drivers/char/ps2ser.c)
+ *
+ * Used by the PS/2 multiplexer driver (ps2mult.c)
+ *
+ ***********************************************************************/
+
+#include <common.h>
+
+#ifdef CONFIG_PS2SERIAL
+
+#include <asm/io.h>
+#include <asm/atomic.h>
+#include <ps2mult.h>
+
+/* #define DEBUG */
+
+#define PS2SER_BAUD 57600
+
+static int ps2ser_getc_hw(void);
+static void ps2ser_interrupt(void *dev_id);
+
+extern struct serial_state rs_table[]; /* in serial.c */
+static struct serial_state *state = rs_table + CONFIG_PS2SERIAL;
+
+static u_char ps2buf[PS2BUF_SIZE];
+static atomic_t ps2buf_cnt;
+static int ps2buf_in_idx;
+static int ps2buf_out_idx;
+
+
+static inline unsigned int ps2ser_in(int offset)
+{
+ return readb((unsigned long) state->iomem_base + offset);
+}
+
+static inline void ps2ser_out(int offset, int value)
+{
+ writeb(value, (unsigned long) state->iomem_base + offset);
+}
+
+int ps2ser_init(void)
+{
+ int quot = state->baud_base / PS2SER_BAUD;
+ unsigned cval = 0x3; /* 8N1 - 8 data bits, no parity bits, 1 stop bit */
+
+ /* Set speed, enable interrupts, enable FIFO
+ */
+ ps2ser_out(UART_LCR, cval | UART_LCR_DLAB);
+ ps2ser_out(UART_DLL, quot & 0xff);
+ ps2ser_out(UART_DLM, quot >> 8);
+ ps2ser_out(UART_LCR, cval);
+ ps2ser_out(UART_IER, UART_IER_RDI);
+ ps2ser_out(UART_MCR, UART_MCR_OUT2 | UART_MCR_DTR | UART_MCR_RTS);
+ ps2ser_out(UART_FCR,
+ UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
+
+ /* If we read 0xff from the LSR, there is no UART here
+ */
+ if (ps2ser_in(UART_LSR) == 0xff) {
+ printf ("ps2ser.c: no UART found\n");
+ return -1;
+ }
+
+ irq_install_handler(state->irq, ps2ser_interrupt, NULL);
+
+ return 0;
+}
+
+void ps2ser_putc(int chr)
+{
+#ifdef DEBUG
+ printf(">>>> 0x%02x\n", chr);
+#endif
+
+ while (!(ps2ser_in(UART_LSR) & UART_LSR_THRE));
+
+ ps2ser_out(UART_TX, chr);
+}
+
+static int ps2ser_getc_hw(void)
+{
+ int res = -1;
+
+ if (ps2ser_in(UART_LSR) & UART_LSR_DR) {
+ res = (ps2ser_in(UART_RX));
+ }
+
+ return res;
+}
+
+int ps2ser_getc(void)
+{
+ volatile int chr;
+ int flags;
+
+#ifdef DEBUG
+ printf("<< ");
+#endif
+
+ flags = disable_interrupts();
+
+ do {
+ if (atomic_read(&ps2buf_cnt) != 0) {
+ chr = ps2buf[ps2buf_out_idx++];
+ ps2buf_out_idx &= (PS2BUF_SIZE - 1);
+ atomic_dec(&ps2buf_cnt);
+ } else {
+ chr = ps2ser_getc_hw();
+ }
+ }
+ while (chr < 0);
+
+ if (flags) enable_interrupts();
+
+#ifdef DEBUG
+ printf("0x%02x\n", chr);
+#endif
+
+ return chr;
+}
+
+int ps2ser_check(void)
+{
+ int flags;
+
+ flags = disable_interrupts();
+ ps2ser_interrupt(NULL);
+ if (flags) enable_interrupts();
+
+ return atomic_read(&ps2buf_cnt);
+}
+
+static void ps2ser_interrupt(void *dev_id)
+{
+ int chr;
+ int iir;
+
+ do {
+ chr = ps2ser_getc_hw();
+ iir = ps2ser_in(UART_IIR);
+ if (chr < 0) continue;
+
+ if (atomic_read(&ps2buf_cnt) < PS2BUF_SIZE) {
+ ps2buf[ps2buf_in_idx++] = chr;
+ ps2buf_in_idx &= (PS2BUF_SIZE - 1);
+ atomic_inc(&ps2buf_cnt);
+ } else {
+ printf ("ps2ser.c: buffer overflow\n");
+ }
+ } while (iir & UART_IIR_RDI);
+
+ if (atomic_read(&ps2buf_cnt)) {
+ ps2mult_callback(atomic_read(&ps2buf_cnt));
+ }
+}
+
+#endif /* CONFIG_PS2SERIAL */
/*
* Supported commands
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | ADD_PCI_CMD | \
- CFG_CMD_I2C | CFG_CMD_EEPROM)
+#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ ADD_PCI_CMD | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_I2C | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_IMMAP | \
+ CFG_CMD_ELF | \
+ CFG_CMD_MII | \
+ CFG_CMD_BEDBUG \
+ )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CONFIG_RTC_MPC5200 1 /* use 5200 RTC */
+
/*
* Various low-level settings
*/
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
#define CONFIG_NEC_NL6448BC33_54 /* NEC NL6448BC33_54 display */
#ifdef CONFIG_LCD /* with LCD controller ? */
-#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/
+#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/
#endif
-#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
+#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */
-#define CONFIG_BOOTCOUNT_LIMIT
+#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
+#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
+#define CONFIG_PS2SERIAL 2 /* .. on COM3 */
+
+#define CONFIG_BOOTCOUNT_LIMIT
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#undef CONFIG_BOOTARGS
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath)\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
+#define CONFIG_MISC_INIT_R 1
+
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
- else immr->im_cpm.cp_pbdat &= ~PB_SDA
+ else immr->im_cpm.cp_pbdat &= ~PB_SDA
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
- else immr->im_cpm.cp_pbdat &= ~PB_SCL
+ else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if 0
-#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
+#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#endif
#ifdef CFG_HUSH_PARSER
-#define CFG_PROMPT_HUSH_PS2 "> "
+#define CFG_PROMPT_HUSH_PS2 "> "
#endif
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
-#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
-#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CFG_INIT_RAM_ADDR CFG_IMMR
-#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
-#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
-#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MONITOR_BASE CFG_FLASH_BASE
-#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
-#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
+#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
* Hardware Information Block
*/
#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
-#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
+#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
/*-----------------------------------------------------------------------
*-----------------------------------------------------------------------
* PCMCIA config., multi-function pin tri-state
*/
-#ifndef CONFIG_CAN_DRIVER
+#ifndef CONFIG_CAN_DRIVER
#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#else /* we must activate GPL5 in the SIUMCR for CAN */
#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
#define CFG_PCMCIA_IO_ADDR (0xEC100000)
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
-#define NSCU_OE_INV 1 /* PCMCIA_GCRX_CXOE is inverted */
+#define NSCU_OE_INV 1 /* PCMCIA_GCRX_CXOE is inverted */
#endif
/*-----------------------------------------------------------------------
*-----------------------------------------------------------------------
*/
-#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
+#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
-#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
-#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
#undef CONFIG_IDE_RESET /* reset for ide not supported */
+#ifndef CONFIG_STATUS_LED /* Status and IDE LED's are mutually exclusive */
+#define CONFIG_IDE_LED 1 /* LED for ide supported */
+#endif
#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
*-----------------------------------------------------------------------
*
*/
-#define CFG_DER 0
+#define CFG_DER 0
/*
* Init Memory Controller:
*/
#if defined(CONFIG_80MHz)
/* 80 MHz CPU - 40 MHz bus: ACS = 00, TRLX = 0, CSNT = 1, SCY = 3, EHTR = 1 */
-#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | 0 | OR_CSNT_SAM | \
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | 0 | OR_CSNT_SAM | \
OR_SCY_3_CLK | OR_EHTR | OR_BI)
#elif defined(CONFIG_66MHz)
/* 66 MHz CPU - 66 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 1 */
*/
#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
#define SDRAM_BASE3_PRELIM 0x20000000 /* SDRAM bank #1 */
-#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
+#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
#define CFG_OR_TIMING_SDRAM 0x00000A00
#define CFG_OR2_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM )
#define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
-#ifndef CONFIG_CAN_DRIVER
-#define CFG_OR3_PRELIM CFG_OR2_PRELIM
+#ifndef CONFIG_CAN_DRIVER
+#define CFG_OR3_PRELIM CFG_OR2_PRELIM
#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
#else /* CAN uses CS3#, so we can have only one SDRAM bank anyway */
-#define CFG_CAN_BASE 0xC0000000 /* CAN mapped at 0xC0000000 */
+#define CFG_CAN_BASE 0xC0000000 /* CAN mapped at 0xC0000000 */
#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */
#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA | OR_BI)
#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \
* gclk CPU clock (not bus clock!)
* Trefresh Refresh cycle * 4 (four word bursts used)
*
- * 4096 Rows from SDRAM example configuration
- * 1000 factor s -> ms
- * 32 PTP (pre-divider from MPTPR) from SDRAM example configuration
- * 4 Number of refresh cycles per period
- * 64 Refresh cycle in ms per number of rows
+ * 4096 Rows from SDRAM example configuration
+ * 1000 factor s -> ms
+ * 32 PTP (pre-divider from MPTPR) from SDRAM example configuration
+ * 4 Number of refresh cycles per period
+ * 64 Refresh cycle in ms per number of rows
* --------------------------------------------
* Divider = 4096 * 32 * 1000 / (4 * 64) = 512000
*
*
* Boot Flags
*/
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */
--- /dev/null
+#ifndef __KEYBOARD_H
+#define __KEYBOARD_H
+
+#ifdef CONFIG_PS2MULT
+#include <ps2mult.h>
+#endif
+
+#if !defined(kbd_request_region) || \
+ !defined(kbd_request_irq) || \
+ !defined(kbd_read_input) || \
+ !defined(kbd_read_status) || \
+ !defined(kbd_write_output) || \
+ !defined(kbd_write_command)
+#error PS/2 low level routines not defined
+#endif
+
+extern int kbd_init (void);
+extern void handle_scancode(unsigned char scancode);
+extern int kbd_init_hw(void);
+extern void pckbd_leds(unsigned char leds);
+
+#endif /* __KEYBOARD_H */
--- /dev/null
+/*
+ * include/linux/pc_keyb.h
+ *
+ * PC Keyboard And Keyboard Controller
+ *
+ * (c) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
+ */
+
+/*
+ * Configuration Switches
+ */
+#undef KBD_REPORT_ERR /* Report keyboard errors */
+#define KBD_REPORT_UNKN /* Report unknown scan codes */
+#define KBD_REPORT_TIMEOUTS /* Report keyboard timeouts */
+#undef KBD_IS_FOCUS_9000 /* We have the brain-damaged FOCUS-9000 keyboard */
+#undef INITIALIZE_MOUSE /* Define if your PS/2 mouse needs initialization. */
+
+#define KBD_INIT_TIMEOUT 1000 /* Timeout in ms for initializing the keyboard */
+#define KBC_TIMEOUT 250 /* Timeout in ms for sending to keyboard controller */
+#define KBD_TIMEOUT 1000 /* Timeout in ms for keyboard command acknowledge */
+
+/*
+ * Internal variables of the driver
+ */
+extern unsigned char pckbd_read_mask;
+extern unsigned char aux_device_present;
+
+/*
+ * Keyboard Controller Registers on normal PCs.
+ */
+#define KBD_STATUS_REG 0x64 /* Status register (R) */
+#define KBD_CNTL_REG 0x64 /* Controller command register (W) */
+#define KBD_DATA_REG 0x60 /* Keyboard data register (R/W) */
+
+/*
+ * Keyboard Controller Commands
+ */
+#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
+#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
+#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
+#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
+#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
+#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
+#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
+#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
+#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
+#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
+#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
+ initiated by the auxiliary device */
+#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
+
+/*
+ * Keyboard Commands
+ */
+#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
+#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
+#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
+#define KBD_CMD_DISABLE 0xF5 /* Disable scanning */
+#define KBD_CMD_RESET 0xFF /* Reset */
+
+/*
+ * Keyboard Replies
+ */
+#define KBD_REPLY_POR 0xAA /* Power on reset */
+#define KBD_REPLY_ACK 0xFA /* Command ACK */
+#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
+
+/*
+ * Status Register Bits
+ */
+#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
+#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
+#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
+#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
+#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
+#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
+#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
+#define KBD_STAT_PERR 0x80 /* Parity error */
+
+#define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF)
+
+/*
+ * Controller Mode Register Bits
+ */
+#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
+#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
+#define KBD_MODE_SYS 0x04 /* The system flag (?) */
+#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
+#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
+#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
+#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
+#define KBD_MODE_RFU 0x80
+
+/*
+ * Mouse Commands
+ */
+#define AUX_SET_RES 0xE8 /* Set resolution */
+#define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */
+#define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */
+#define AUX_GET_SCALE 0xE9 /* Get scaling factor */
+#define AUX_SET_STREAM 0xEA /* Set stream mode */
+#define AUX_SET_SAMPLE 0xF3 /* Set sample rate */
+#define AUX_ENABLE_DEV 0xF4 /* Enable aux device */
+#define AUX_DISABLE_DEV 0xF5 /* Disable aux device */
+#define AUX_RESET 0xFF /* Reset aux device */
+#define AUX_ACK 0xFA /* Command byte ACK. */
+
+#define AUX_BUF_SIZE 2048 /* This might be better divisible by
+ three to make overruns stay in sync
+ but then the read function would need
+ a lock etc - ick */
+
+#if 0
+struct aux_queue {
+ unsigned long head;
+ unsigned long tail;
+ wait_queue_head_t proc_list;
+ struct fasync_struct *fasync;
+ unsigned char buf[AUX_BUF_SIZE];
+};
+#endif
--- /dev/null
+#ifndef __LINUX_PS2MULT_H
+#define __LINUX_PS2MULT_H
+
+#define kbd_request_region() ps2mult_init()
+#define kbd_request_irq(handler) ps2mult_request_irq(handler)
+
+#define kbd_read_input() ps2mult_read_input()
+#define kbd_read_status() ps2mult_read_status()
+#define kbd_write_output(val) ps2mult_write_output(val)
+#define kbd_write_command(val) ps2mult_write_command(val)
+
+#define aux_request_irq(hand, dev_id) 0
+#define aux_free_irq(dev_id)
+
+#define PS2MULT_KB_SELECTOR 0xA0
+#define PS2MULT_MS_SELECTOR 0xA1
+#define PS2MULT_ESCAPE 0x7D
+#define PS2MULT_BSYNC 0x7E
+#define PS2MULT_SESSION_START 0x55
+#define PS2MULT_SESSION_END 0x56
+
+#define PS2BUF_SIZE 512 /* power of 2, please */
+
+ /* PS/2 controller interface (include/asm/keyboard.h)
+ */
+extern int ps2mult_init (void);
+extern int ps2mult_request_irq(void (*handler)(void *));
+extern u_char ps2mult_read_input(void);
+extern u_char ps2mult_read_status(void);
+extern void ps2mult_write_output(u_char val);
+extern void ps2mult_write_command(u_char val);
+
+extern void ps2mult_callback (int in_cnt);
+
+ /* Simple serial interface
+ */
+extern int ps2ser_init(void);
+extern void ps2ser_putc(int chr);
+extern int ps2ser_getc(void);
+extern int ps2ser_check(void);
+
+
+ /* Serial related stuff
+ */
+struct serial_state {
+ int baud_base;
+ int irq;
+ u8 *iomem_base;
+};
+
+#define UART_RX 0 /* In: Receive buffer (DLAB=0) */
+#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */
+#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */
+
+#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */
+#define UART_IER 1 /* Out: Interrupt Enable Register */
+
+#define UART_IIR 2 /* In: Interrupt ID Register */
+#define UART_FCR 2 /* Out: FIFO Control Register */
+
+#define UART_LCR 3 /* Out: Line Control Register */
+#define UART_MCR 4 /* Out: Modem Control Register */
+#define UART_LSR 5 /* In: Line Status Register */
+#define UART_MSR 6 /* In: Modem Status Register */
+#define UART_SCR 7 /* I/O: Scratch Register */
+
+/*
+ * These are the definitions for the FIFO Control Register
+ * (16650 only)
+ */
+#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
+#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
+#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
+#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */
+#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */
+#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */
+#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */
+#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */
+#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */
+
+/*
+ * These are the definitions for the Line Control Register
+ *
+ * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting
+ * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits.
+ */
+#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
+#define UART_LCR_SBC 0x40 /* Set break control */
+#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
+#define UART_LCR_EPAR 0x10 /* Even parity select */
+#define UART_LCR_PARITY 0x08 /* Parity Enable */
+#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */
+#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */
+#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */
+#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
+#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
+
+/*
+ * These are the definitions for the Line Status Register
+ */
+#define UART_LSR_TEMT 0x40 /* Transmitter empty */
+#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
+#define UART_LSR_BI 0x10 /* Break interrupt indicator */
+#define UART_LSR_FE 0x08 /* Frame error indicator */
+#define UART_LSR_PE 0x04 /* Parity error indicator */
+#define UART_LSR_OE 0x02 /* Overrun error indicator */
+#define UART_LSR_DR 0x01 /* Receiver data ready */
+
+/*
+ * These are the definitions for the Interrupt Identification Register
+ */
+#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
+#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
+
+#define UART_IIR_MSI 0x00 /* Modem status interrupt */
+#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
+#define UART_IIR_RDI 0x04 /* Receiver data interrupt */
+#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
+
+/*
+ * These are the definitions for the Interrupt Enable Register
+ */
+#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
+#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
+#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
+#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
+
+/*
+ * These are the definitions for the Modem Control Register
+ */
+#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
+#define UART_MCR_OUT2 0x08 /* Out2 complement */
+#define UART_MCR_OUT1 0x04 /* Out1 complement */
+#define UART_MCR_RTS 0x02 /* RTS complement */
+#define UART_MCR_DTR 0x01 /* DTR complement */
+
+/*
+ * These are the definitions for the Modem Status Register
+ */
+#define UART_MSR_DCD 0x80 /* Data Carrier Detect */
+#define UART_MSR_RI 0x40 /* Ring Indicator */
+#define UART_MSR_DSR 0x20 /* Data Set Ready */
+#define UART_MSR_CTS 0x10 /* Clear to Send */
+#define UART_MSR_DDCD 0x08 /* Delta DCD */
+#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */
+#define UART_MSR_DDSR 0x02 /* Delta DSR */
+#define UART_MSR_DCTS 0x01 /* Delta CTS */
+#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */
+
+#endif /* __LINUX_PS2MULT_H */
#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
#include <asm/cache.h>
#endif
+#ifdef CONFIG_PS2KBD
+#include <keyboard.h>
+#endif
#if (CONFIG_COMMANDS & CFG_CMD_DOC)
void doc_init (void);
}
#endif
+#ifdef CONFIG_PS2KBD
+ puts ("PS/2: ");
+ kbd_init();
+#endif
+
#ifdef CONFIG_MODEM_SUPPORT
{
extern int do_mdm_init;
#
-# (C) Copyright 2001
+# (C) Copyright 2001-2004
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
ds12887.o ds1302.o ds1306.o ds1307.o ds1337.o \
ds1556.o ds164x.o ds174x.o \
m41t11.o m48t35ax.o mc146818.o mk48t59.o \
- mpc8xx.o pcf8563.o s3c24x0_rtc.o
+ mpc5xxx mpc8xx.o pcf8563.o s3c24x0_rtc.o
all: $(LIB)
--- /dev/null
+/*
+ * (C) Copyright 2004
+ * Reinhard Meyer, EMK Elektronik GmbH
+ * r.meyer@emk-elektronik.de
+ * www.emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*****************************************************************************
+ * Date & Time support for internal RTC of MPC52xx
+ *****************************************************************************/
+/*#define DEBUG*/
+
+#include <common.h>
+#include <command.h>
+#include <rtc.h>
+
+#if defined(CONFIG_RTC_MPC5200) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+
+/*****************************************************************************
+ * this structure should be defined in mpc5200.h ...
+ *****************************************************************************/
+typedef struct rtc5200 {
+ volatile ulong tsr; /* MBAR+0x800: time set register */
+ volatile ulong dsr; /* MBAR+0x804: data set register */
+ volatile ulong nysr; /* MBAR+0x808: new year and stopwatch register */
+ volatile ulong aier; /* MBAR+0x80C: alarm and interrupt enable register */
+ volatile ulong ctr; /* MBAR+0x810: current time register */
+ volatile ulong cdr; /* MBAR+0x814: current data register */
+ volatile ulong asir; /* MBAR+0x818: alarm and stopwatch interupt register */
+ volatile ulong piber; /* MBAR+0x81C: periodic interrupt and bus error register */
+ volatile ulong trdr; /* MBAR+0x820: test register/divides register */
+} RTC5200;
+
+#define RTC_SET 0x02000000
+#define RTC_PAUSE 0x01000000
+
+/*****************************************************************************
+ * get time
+ *****************************************************************************/
+void rtc_get (struct rtc_time *tmp)
+{
+ RTC5200 *rtc = (RTC5200 *) (CFG_MBAR+0x800);
+ ulong time, date, time2;
+
+ /* read twice to avoid getting a funny time when the second is just changing */
+ do {
+ time = rtc->ctr;
+ date = rtc->cdr;
+ time2 = rtc->ctr;
+ } while (time != time2);
+
+ tmp->tm_year = date & 0xfff;
+ tmp->tm_mon = (date >> 24) & 0xf;
+ tmp->tm_mday = (date >> 16) & 0x1f;
+ tmp->tm_wday = (date >> 21) & 7;
+ /* sunday is 7 in 5200 but 0 in rtc_time */
+ if (tmp->tm_wday == 7)
+ tmp->tm_wday = 0;
+ tmp->tm_hour = (time >> 16) & 0x1f;
+ tmp->tm_min = (time >> 8) & 0x3f;
+ tmp->tm_sec = time & 0x3f;
+
+ debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+}
+
+/*****************************************************************************
+ * set time
+ *****************************************************************************/
+void rtc_set (struct rtc_time *tmp)
+{
+ RTC5200 *rtc = (RTC5200 *) (CFG_MBAR+0x800);
+ ulong time, date, year;
+
+ debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+ time = (tmp->tm_hour << 16) | (tmp->tm_min << 8) | tmp->tm_sec;
+ date = (tmp->tm_mon << 16) | tmp->tm_mday;
+ if (tmp->tm_wday == 0)
+ date |= (7 << 8);
+ else
+ date |= (tmp->tm_wday << 8);
+ year = tmp->tm_year;
+
+ /* mask unwanted bits that might show up when rtc_time is corrupt */
+ time &= 0x001f3f3f;
+ date &= 0x001f071f;
+ year &= 0x00000fff;
+
+ /* pause and set the RTC */
+ rtc->nysr = year;
+ rtc->dsr = date | RTC_PAUSE;
+ udelay (1000);
+ rtc->dsr = date | RTC_PAUSE | RTC_SET;
+ udelay (1000);
+ rtc->dsr = date | RTC_PAUSE;
+ udelay (1000);
+ rtc->dsr = date;
+ udelay (1000);
+
+ rtc->tsr = time | RTC_PAUSE;
+ udelay (1000);
+ rtc->tsr = time | RTC_PAUSE | RTC_SET;
+ udelay (1000);
+ rtc->tsr = time | RTC_PAUSE;
+ udelay (1000);
+ rtc->tsr = time;
+ udelay (1000);
+}
+
+/*****************************************************************************
+ * reset rtc circuit
+ *****************************************************************************/
+void rtc_reset (void)
+{
+ return; /* nothing to do */
+}
+
+#endif /* CONFIG_RTC_MPC5200 && CFG_CMD_DATE */
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