]> git.sur5r.net Git - u-boot/commitdiff
AT91CAP9ADK: Handle 8 or 16 bit NAND
authorStelian Pop <stelian@popies.net>
Thu, 8 May 2008 18:52:14 +0000 (20:52 +0200)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Sat, 10 May 2008 09:32:06 +0000 (11:32 +0200)
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
board/atmel/at91cap9adk/at91cap9adk.c
board/atmel/at91cap9adk/nand.c
include/configs/at91cap9adk.h

index 5de52b9197e6939a3eb3626606fda1fafdac9d86..67e16bb866b619211c26bcada974288a72d4f4b5 100644 (file)
@@ -116,7 +116,12 @@ static void at91cap9_nand_hw_init(void)
        at91_sys_write(AT91_SMC_MODE(3),
                       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
                       AT91_SMC_EXNWMODE_DISABLE |
-                      AT91_SMC_DBW_8 | AT91_SMC_TDF_(1));
+#ifdef CFG_NAND_DBW_16
+                      AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+                      AT91_SMC_DBW_8 |
+#endif
+                      AT91_SMC_TDF_(1));
 
        at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
 
@@ -252,7 +257,6 @@ int board_init(void)
 #ifdef CONFIG_USB_OHCI_NEW
        at91cap9_uhp_hw_init();
 #endif
-
        return 0;
 }
 
index 28091a4226f5a970aa7d0f2b0ab696480ba445f2..0432ef13d8525253d382c277b103ccc0862a2937 100644 (file)
@@ -63,6 +63,9 @@ static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
 int board_nand_init(struct nand_chip *nand)
 {
        nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+       nand->options = NAND_BUSWIDTH_16;
+#endif
        nand->hwcontrol = at91cap9adk_nand_hwcontrol;
        nand->chip_delay = 20;
 
index c891fa80ed4721473840766dd1f1b1be5e8602bf..7887b36db0755e46ba3060ce4bbeb6a9d903a46a 100644 (file)
 #define NAND_MAX_CHIPS                 1
 #define CFG_MAX_NAND_DEVICE            1
 #define CFG_NAND_BASE                  0x40000000
+#define CFG_NAND_DBW_8                 1
 
 /* Ethernet */
 #define CONFIG_MACB                    1