Align the SSP clock speed with oscilator to achieve
higher transfer stability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
 
        /* SSP0 clock at 96MHz */
        mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
-       /* SSP2 clock at 96MHz */
-       mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
+       /* SSP2 clock at 160MHz */
+       mx28_set_sspclk(MXC_SSPCLK2, 160000, 0);
 
 #ifdef CONFIG_CMD_USB
        mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
 
 #define        CONFIG_SPI_FLASH_STMICRO
 #define        CONFIG_SF_DEFAULT_CS            2
 #define        CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
-#define        CONFIG_SF_DEFAULT_SPEED         24000000
+#define        CONFIG_SF_DEFAULT_SPEED         40000000
 
 #define        CONFIG_ENV_SPI_CS               0
 #define        CONFIG_ENV_SPI_BUS              2
-#define        CONFIG_ENV_SPI_MAX_HZ           24000000
+#define        CONFIG_ENV_SPI_MAX_HZ           40000000
 #define        CONFIG_ENV_SPI_MODE             SPI_MODE_0
 #endif
 #endif