]> git.sur5r.net Git - u-boot/commitdiff
rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATA
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Mon, 14 Aug 2017 17:05:32 +0000 (19:05 +0200)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Mon, 18 Sep 2017 18:40:38 +0000 (20:40 +0200)
With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
OF_PLATDATA structure layout changes.  This adjusts the DMC driver for
the RK3368 to track these changes.

For the time being (i.e. until regmap_init_mem_platdata works for the
64bit case), we won't use regmap_init_mem_platdata here and simply
access of_plat.reg[] directly.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
drivers/ram/rockchip/dmc-rk3368.c

index ca7b1ff0c841517cb84e2417055938ab5fbc1cc1..7577ff0363d66cedba303597bbba13340f2850a1 100644 (file)
@@ -893,18 +893,11 @@ static int conv_of_platdata(struct udevice *dev)
 {
        struct rk3368_sdram_params *plat = dev_get_platdata(dev);
        struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat;
-       int ret;
 
        plat->ddr_freq = of_plat->rockchip_ddr_frequency;
        plat->ddr_speed_bin = of_plat->rockchip_ddr_speed_bin;
        plat->memory_schedule = of_plat->rockchip_memory_schedule;
 
-       ret = regmap_init_mem_platdata(dev, of_plat->reg,
-                                      ARRAY_SIZE(of_plat->reg) / 2,
-                                      &plat->map);
-       if (ret)
-               return ret;
-
        return 0;
 }
 #endif
@@ -933,8 +926,8 @@ static int rk3368_dmc_probe(struct udevice *dev)
        debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 
 #ifdef CONFIG_TPL_BUILD
-       pctl = regmap_get_range(plat->map, 0);
-       ddrphy = regmap_get_range(plat->map, 1);
+       pctl = (struct rk3368_ddr_pctl *)plat->of_plat.reg[0];
+       ddrphy = (struct rk3368_ddrphy *)plat->of_plat.reg[2];
        msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
        grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);