]> git.sur5r.net Git - u-boot/commitdiff
net: e1000: Fix build warnings for 32-bit
authorBin Meng <bmeng.cn@gmail.com>
Wed, 26 Aug 2015 13:17:27 +0000 (06:17 -0700)
committerSimon Glass <sjg@chromium.org>
Wed, 26 Aug 2015 14:54:01 +0000 (07:54 -0700)
commit 6497e37 "net: e1000: Support 64-bit physical address" causes
compiler warnings on 32-bit U-Boot build below.

drivers/net/e1000.c: In function 'e1000_configure_tx':
drivers/net/e1000.c:4982:2: warning: right shift count >= width of type [enabled by default]
drivers/net/e1000.c: In function 'e1000_configure_rx':
drivers/net/e1000.c:5126:2: warning: right shift count >= width of type [enabled by default]

This commit fixes the build warnings.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/e1000.c

index 6f74d304d1e4c9257ce7f3a6150fbec1d59c98c5..7b830ff8c0515a66f763ff4c4270965f39a2e65a 100644 (file)
@@ -4978,8 +4978,8 @@ e1000_configure_tx(struct e1000_hw *hw)
        unsigned long tipg, tarc;
        uint32_t ipgr1, ipgr2;
 
-       E1000_WRITE_REG(hw, TDBAL, (unsigned long)tx_base & 0xffffffff);
-       E1000_WRITE_REG(hw, TDBAH, (unsigned long)tx_base >> 32);
+       E1000_WRITE_REG(hw, TDBAL, lower_32_bits((unsigned long)tx_base));
+       E1000_WRITE_REG(hw, TDBAH, upper_32_bits((unsigned long)tx_base));
 
        E1000_WRITE_REG(hw, TDLEN, 128);
 
@@ -5103,6 +5103,7 @@ e1000_configure_rx(struct e1000_hw *hw)
 {
        unsigned long rctl, ctrl_ext;
        rx_tail = 0;
+
        /* make sure receives are disabled while setting up the descriptors */
        rctl = E1000_READ_REG(hw, RCTL);
        E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
@@ -5122,8 +5123,8 @@ e1000_configure_rx(struct e1000_hw *hw)
                E1000_WRITE_FLUSH(hw);
        }
        /* Setup the Base and Length of the Rx Descriptor Ring */
-       E1000_WRITE_REG(hw, RDBAL, (unsigned long)rx_base & 0xffffffff);
-       E1000_WRITE_REG(hw, RDBAH, (unsigned long)rx_base >> 32);
+       E1000_WRITE_REG(hw, RDBAL, lower_32_bits((unsigned long)rx_base));
+       E1000_WRITE_REG(hw, RDBAH, upper_32_bits((unsigned long)rx_base));
 
        E1000_WRITE_REG(hw, RDLEN, 128);