unsigned long page_addr, byte_addr, page_size;
        size_t chunk_len, actual;
        int ret;
-       u8 cmd[4], bank_sel;
+       u8 cmd[4];
 
        page_size = flash->page_size;
 
 
        cmd[0] = CMD_PAGE_PROGRAM;
        for (actual = 0; actual < len; actual += chunk_len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+               u8 bank_sel;
+
                bank_sel = offset / SPI_FLASH_16MB_BOUN;
 
                ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
                        debug("SF: fail to set bank%d\n", bank_sel);
                        return ret;
                }
-
+#endif
                page_addr = offset / page_size;
                byte_addr = offset % page_size;
                chunk_len = min(len - actual, page_size - byte_addr);
 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
                size_t len, void *data)
 {
-       u8 cmd[5], bank_sel;
+       u8 cmd[5], bank_sel = 0;
        u32 remain_len, read_len;
        int ret = -1;
 
        cmd[4] = 0x00;
 
        while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
                bank_sel = offset / SPI_FLASH_16MB_BOUN;
 
                ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
                        debug("SF: fail to set bank%d\n", bank_sel);
                        return ret;
                }
-
+#endif
                remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
                if (len < remain_len)
                        read_len = len;
 {
        u32 erase_size;
        int ret;
-       u8 cmd[4], bank_sel;
+       u8 cmd[4];
 
        erase_size = flash->sector_size;
        if (offset % erase_size || len % erase_size) {
                cmd[0] = CMD_ERASE_64K;
 
        while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+               u8 bank_sel;
+
                bank_sel = offset / SPI_FLASH_16MB_BOUN;
 
                ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
                        debug("SF: fail to set bank%d\n", bank_sel);
                        return ret;
                }
-
+#endif
                spi_flash_addr(offset, cmd);
 
                debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
        return 0;
 }
 
+#ifdef CONFIG_SPI_FLASH_BAR
 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
 {
        u8 cmd;
 
        return 0;
 }
+#endif
 
 #ifdef CONFIG_OF_CONTROL
 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
                goto err_manufacturer_probe;
        }
 
+#ifdef CONFIG_SPI_FLASH_BAR
        /* Configure the BAR - disover bank cmds and read current bank  */
        ret = spi_flash_bank_config(flash, *idp);
        if (ret < 0)
                goto err_manufacturer_probe;
+#endif
 
 #ifdef CONFIG_OF_CONTROL
        if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
 
 #define SPI_FLASH_STMICRO_IDCODE0      0x20
 #define SPI_FLASH_WINBOND_IDCODE0      0xef
 
+#ifdef CONFIG_SPI_FLASH_BAR
 /* Bank addr access commands */
-#define CMD_BANKADDR_BRWR              0x17
-#define CMD_BANKADDR_BRRD              0x16
-#define CMD_EXTNADDR_WREAR             0xC5
-#define CMD_EXTNADDR_RDEAR             0xC8
+# define CMD_BANKADDR_BRWR             0x17
+# define CMD_BANKADDR_BRRD             0x16
+# define CMD_EXTNADDR_WREAR            0xC5
+# define CMD_EXTNADDR_RDEAR            0xC8
+#endif
 
 /* Common status */
 #define STATUS_WIP                     0x01
 /* Program the status register. */
 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
 
+#ifdef CONFIG_SPI_FLASH_BAR
 /* Program the bank address register */
 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
 
 /* Configure the BAR - discover the bank cmds */
 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0);
+#endif
 
 /*
  * Same as spi_flash_cmd_read() except it also claims/releases the SPI