sun8i_emac: Fix mdio read sequence

To send a parametrized command to the PHY over MDIO, we should write
the data first, the trigger the execution by the command register
write. Fix the access pattern in our MDIO write routine.
Apparently this doesn't really matter with the Realtek PHY on the
Pine64, but other PHYs (which require more setup) will choke on
the wrong order.
[Andre: add commit message]

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 6ac8ba3721f8000f6633fe28fd517c97429a0563..abd9cc8bc0b3ba51ab826b1cfc8c4bbfd9e675aa 100644 (file)
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -180,8 +180,8 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
        miiaddr |= MDIO_CMD_MII_WRITE;
        miiaddr |= MDIO_CMD_MII_BUSY;
 
-       writel(miiaddr, priv->mac_reg + EMAC_MII_CMD);
        writel(val, priv->mac_reg + EMAC_MII_DATA);
+       writel(miiaddr, priv->mac_reg + EMAC_MII_CMD);
 
        start = get_timer(0);
        while (get_timer(start) < timeout) {