powerpc/85xx: Adds some P1010/P1014 SoC configuration defines

Add defines for FSL_SATA_V2, # of DDR controllers, reset value of CCSRBAR
and SDHC erratum.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 040e71b977df92285c728f886e4e2749e7b37fdb..ac304f30c919e0b5582382dee7982325e687b0b1 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -91,6 +91,10 @@
 #define CONFIG_SYS_FSL_NUM_LAWS                12
 #define CONFIG_TSECV2
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
+#define CONFIG_FSL_SATA_V2
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_NUM_DDR_CONTROLLERS     1
+#define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000
 
 /* P1011 is single core version of P1020 */
 #elif defined(CONFIG_P1011)
@@ -127,6 +131,10 @@
 #define CONFIG_SYS_FSL_NUM_LAWS                12
 #define CONFIG_TSECV2
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
+#define CONFIG_FSL_SATA_V2
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_NUM_DDR_CONTROLLERS     1
+#define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000
 
 /* P1015 is single core version of P1024 */
 #elif defined(CONFIG_P1015)