break;
case MIDR_CORTEX_A9_R1P2:
switch (readl(CONTROL_ID_CODE)) {
- case OMAP4_CONTROL_ID_CODE_ES2_0:
+ case OMAP4430_CONTROL_ID_CODE_ES2_0:
*omap4_revision = OMAP4430_ES2_0;
break;
- case OMAP4_CONTROL_ID_CODE_ES2_1:
+ case OMAP4430_CONTROL_ID_CODE_ES2_1:
*omap4_revision = OMAP4430_ES2_1;
break;
- case OMAP4_CONTROL_ID_CODE_ES2_2:
+ case OMAP4430_CONTROL_ID_CODE_ES2_2:
*omap4_revision = OMAP4430_ES2_2;
break;
default:
/* CONTROL_ID_CODE */
#define CONTROL_ID_CODE 0x4A002204
-#define OMAP4_CONTROL_ID_CODE_ES1_0 0x0B85202F
-#define OMAP4_CONTROL_ID_CODE_ES2_0 0x1B85202F
-#define OMAP4_CONTROL_ID_CODE_ES2_1 0x3B95C02F
-#define OMAP4_CONTROL_ID_CODE_ES2_2 0x4B95C02F
-#define OMAP4_CONTROL_ID_CODE_ES2_3 0x6B95C02F
+#define OMAP4430_CONTROL_ID_CODE_ES1_0 0x0B85202F
+#define OMAP4430_CONTROL_ID_CODE_ES2_0 0x1B85202F
+#define OMAP4430_CONTROL_ID_CODE_ES2_1 0x3B95C02F
+#define OMAP4430_CONTROL_ID_CODE_ES2_2 0x4B95C02F
+#define OMAP4430_CONTROL_ID_CODE_ES2_3 0x6B95C02F
/* UART */
#define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000)