]> git.sur5r.net Git - u-boot/commitdiff
arc: introduce separate section for interrupt vector table
authorIgor Guryanov <guryanov@synopsys.com>
Wed, 24 Dec 2014 14:17:11 +0000 (17:17 +0300)
committerAlexey Brodkin <abrodkin@synopsys.com>
Thu, 15 Jan 2015 19:38:42 +0000 (22:38 +0300)
Even though existing implementation works fine in preparation to
submission of ARCv2 architecture we need this change.

In case of ARCv2 interrupt vector table consists of just addresses
of corresponding handlers. And if those addresses will be in .text
section then assembler will encode them as everything in .text section
as middle-endian and then on real execution CPU will read swapped
addresses and will jump into the wild.

Once introduced new section is situated so .text section remains the
first which allows us to use common linker option for linking everything
to a specified CONFIG_SYS_TEXT_BASE.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
arch/arc/Makefile
arch/arc/cpu/arc700/Makefile
arch/arc/cpu/arc700/start.S
arch/arc/cpu/arc700/u-boot.lds
arch/arc/include/asm/sections.h
arch/arc/lib/relocate.c
arch/arc/lib/sections.c

index 03ea6dbae0d73d8a61e327af0e9e132b70c7028c..a59231e70ebe7a9c092b4f25ab30cf91a38ca37e 100644 (file)
@@ -2,8 +2,6 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-head-y := arch/arc/cpu/$(CPU)/start.o
-
 libs-y += arch/arc/cpu/$(CPU)/
 libs-y += arch/arc/lib/
 
index cdc50022901a00b6a581dcc23c0e94b471ffe1b8..021e3a2b5d0e81e9c21a346ff3703a8cb784fd09 100644 (file)
@@ -4,10 +4,9 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-extra-y        += start.o
-
 obj-y  += cache.o
 obj-y  += cpu.o
 obj-y  += interrupts.o
 obj-y  += reset.o
+obj-y  += start.o
 obj-y  += timer.o
index 2318282bf404a6302fbe979c32f8a41c2e879f0f..01cfba493392eb40eda2c720ccf48f471a66c11f 100644 (file)
 #endif
 .endm
 
+.section .ivt, "ax",@progbits
 .align 4
-.globl _start
-_start:
+_ivt:
        /* Critical system events */
-       j       reset                   /* 0 - 0x000 */
+       j       _start                  /* 0 - 0x000 */
        j       memory_error            /* 1 - 0x008 */
        j       instruction_error       /* 2 - 0x010 */
 
@@ -110,6 +110,28 @@ _start:
        j       EV_Trap                 /* 0x128, Trap exception       (0x25) */
        j       EV_Extension            /* 0x130, Extn Intruction Excp (0x26) */
 
+.text
+.globl _start
+_start:
+       /* Setup interrupt vector base that matches "__text_start" */
+       sr      __ivt_start, [ARC_AUX_INTR_VEC_BASE]
+
+       /* Setup stack pointer */
+       mov     %sp, CONFIG_SYS_INIT_SP_ADDR
+       mov     %fp, %sp
+
+       /* Clear bss */
+       mov     %r0, __bss_start
+       mov     %r1, __bss_end
+
+clear_bss:
+       st.ab   0, [%r0, 4]
+       brlt    %r0, %r1, clear_bss
+
+       /* Zero the one and only argument of "board_init_f" */
+       mov_s   %r0, 0
+       j       board_init_f
+
 memory_error:
        SAVE_ALL_SYS
        SAVE_EXCEPTION_SOURCE
@@ -164,27 +186,6 @@ EV_Extension:
        mov     %r0, %sp
        j       do_extension
 
-
-reset:
-       /* Setup interrupt vector base that matches "__text_start" */
-       sr      __text_start, [ARC_AUX_INTR_VEC_BASE]
-
-       /* Setup stack pointer */
-       mov     %sp, CONFIG_SYS_INIT_SP_ADDR
-       mov     %fp, %sp
-
-       /* Clear bss */
-       mov     %r0, __bss_start
-       mov     %r1, __bss_end
-
-clear_bss:
-       st.ab   0, [%r0, 4]
-       brlt    %r0, %r1, clear_bss
-
-       /* Zero the one and only argument of "board_init_f" */
-       mov_s   %r0, 0
-       j       board_init_f
-
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
index 2d01b21b3670f33078f492c8256025dcd70461c8..ccddbf7dc9b754997b9ae7abc81d8d3b7351a5d6 100644 (file)
@@ -13,7 +13,6 @@ SECTIONS
        .text : {
                *(.__text_start)
                *(.__image_copy_start)
-               CPUDIR/start.o (.text*)
                *(.text*)
        }
 
@@ -23,6 +22,20 @@ SECTIONS
                *(.__text_end)
        }
 
+       . = ALIGN(1024);
+       .ivt_start : {
+               *(.__ivt_start)
+       }
+
+       .ivt :
+       {
+               *(.ivt)
+       }
+
+       .ivt_end : {
+               *(.__ivt_end)
+       }
+
        . = ALIGN(4);
        .rodata : {
                *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
index 18484a17f216e1bbce10c3b4b7ceae79e5e4595c..2a7a98713da6de4ad3139a1cff3135ad56fc84d8 100644 (file)
@@ -10,5 +10,7 @@
 #include <asm-generic/sections.h>
 
 extern ulong __text_end;
+extern ulong __ivt_start;
+extern ulong __ivt_end;
 
 #endif /* __ASM_ARC_SECTIONS_H */
index 2482bcdffcc33103e913a5dc8ee33e0923278b18..5618b6ae938a2e9865c43ef3421b2973b7026fa5 100644 (file)
@@ -44,7 +44,7 @@ int do_elf_reloc_fixups(void)
 #ifdef __LITTLE_ENDIAN__
                        /* If location in ".text" section swap value */
                        if ((unsigned int)offset_ptr_rom <
-                           (unsigned int)&__text_end)
+                           (unsigned int)&__ivt_end)
                                val = (val << 16) | (val >> 16);
 #endif
 
@@ -55,7 +55,7 @@ int do_elf_reloc_fixups(void)
 #ifdef __LITTLE_ENDIAN__
                                /* If location in ".text" section swap value */
                                if ((unsigned int)offset_ptr_rom <
-                                   (unsigned int)&__text_end)
+                                   (unsigned int)&__ivt_end)
                                        val = (val << 16) | (val >> 16);
 #endif
                                memcpy(offset_ptr_ram, &val, sizeof(int));
index b0b46a4e9aeeffdc62c8afaabba74151f17f363a..a72c6946d53e5913b619b4178340e5401191b276 100644 (file)
@@ -19,3 +19,5 @@ char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));
 char __text_start[0] __attribute__((section(".__text_start")));
 char __text_end[0] __attribute__((section(".__text_end")));
 char __init_end[0] __attribute__((section(".__init_end")));
+char __ivt_start[0] __attribute__((section(".__ivt_start")));
+char __ivt_end[0] __attribute__((section(".__ivt_end")));