]> git.sur5r.net Git - u-boot/commitdiff
rockchip: veyron: Adjust ARM clock after relocation
authorSimon Glass <sjg@chromium.org>
Sun, 13 Nov 2016 21:22:14 +0000 (14:22 -0700)
committerSimon Glass <sjg@chromium.org>
Sat, 26 Nov 2016 00:59:31 +0000 (17:59 -0700)
Update board_init() to increase the ARM clock to the maximum speed on
veyron boards. This makes quite a large difference in performance. With
this change, speed goes from about 750 DMIPS to 2720 DMIPs.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/mach-rockchip/rk3288-board.c

index baf9522bcdd87a0ddc5e2bcd144beb83e588c764..bca6075c2c3380c9cd9f118b0b68436c0d18c846 100644 (file)
@@ -16,6 +16,8 @@
 #include <asm/arch/boot_mode.h>
 #include <asm/gpio.h>
 #include <dm/pinctrl.h>
+#include <dt-bindings/clock/rk3288-cru.h>
+#include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -56,6 +58,39 @@ int board_late_init(void)
        return rk_board_late_init();
 }
 
+#ifndef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+static int veyron_init(void)
+{
+       struct udevice *dev;
+       struct clk clk;
+       int ret;
+
+       ret = regulator_get_by_platname("vdd_arm", &dev);
+       if (ret)
+               return ret;
+
+       /* Slowly raise to max CPU voltage to prevent overshoot */
+       ret = regulator_set_value(dev, 1200000);
+       if (ret)
+               return ret;
+       udelay(175); /* Must wait for voltage to stabilize, 2mV/us */
+       ret = regulator_set_value(dev, 1400000);
+       if (ret)
+               return ret;
+       udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
+
+       ret = rockchip_get_clk(&clk.dev);
+       if (ret)
+               return ret;
+       clk.id = PLL_APLL;
+       ret = clk_set_rate(&clk, 1800000000);
+       if (IS_ERR_VALUE(ret))
+               return ret;
+
+       return 0;
+}
+#endif
+
 int board_init(void)
 {
 #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
@@ -87,6 +122,15 @@ err:
 
        return -1;
 #else
+       int ret;
+
+       /* We do some SoC one time setting here */
+       if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) {
+               ret = veyron_init();
+               if (ret)
+                       return ret;
+       }
+
        return 0;
 #endif
 }