]> git.sur5r.net Git - u-boot/commitdiff
spi: Support half-duplex mode in FDT decode
authorSimon Glass <sjg@chromium.org>
Mon, 7 Jul 2014 16:16:39 +0000 (10:16 -0600)
committerJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tue, 5 Aug 2014 18:48:01 +0000 (00:18 +0530)
This parameter should also be supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
doc/device-tree-bindings/spi/spi-bus.txt
drivers/spi/spi.c

index 800dafe5b01b1b6cc0e6c8f4fcd6d9432c9d699f..5c8720a820aa9566738b2ec0ac09da4a19f7057f 100644 (file)
@@ -59,6 +59,8 @@ contain the following properties.
                       used for MOSI. Defaults to 1 if not present.
 - spi-rx-bus-width - (optional) The bus width(number of data wires) that
                       used for MISO. Defaults to 1 if not present.
+- spi-half-duplex  - (optional) Indicates that the SPI bus should wait for
+                     a header byte before reading data from the slave.
 
 Some SPI controllers and devices support Dual and Quad SPI transfer mode.
 It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
index 7ddea9b026a969b4207792f1cfe9e39240e7fc48..7d81fbd7f8f52c31dd9503241e721c9ec8ce6bd8 100644 (file)
@@ -53,6 +53,8 @@ struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
                mode |= SPI_CPHA;
        if (fdtdec_get_bool(blob, node, "spi-cs-high"))
                mode |= SPI_CS_HIGH;
+       if (fdtdec_get_bool(blob, node, "spi-half-duplex"))
+               mode |= SPI_PREAMBLE;
        return spi_setup_slave(busnum, cs, max_hz, mode);
 }
 #endif