]> git.sur5r.net Git - u-boot/commitdiff
Board VOH405 added.
authorstroese <stroese>
Fri, 12 Sep 2003 08:42:13 +0000 (08:42 +0000)
committerstroese <stroese>
Fri, 12 Sep 2003 08:42:13 +0000 (08:42 +0000)
board/esd/voh405/Makefile [new file with mode: 0644]
board/esd/voh405/config.mk [new file with mode: 0644]
board/esd/voh405/flash.c [new file with mode: 0644]
board/esd/voh405/fpgadata.c [new file with mode: 0644]
board/esd/voh405/u-boot.lds [new file with mode: 0644]
board/esd/voh405/voh405.c [new file with mode: 0644]

diff --git a/board/esd/voh405/Makefile b/board/esd/voh405/Makefile
new file mode 100644 (file)
index 0000000..f5bda55
--- /dev/null
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = lib$(BOARD).a
+
+OBJS   = $(BOARD).o flash.o
+
+$(LIB):        $(OBJS) $(SOBJS)
+       $(AR) crv $@ $(OBJS)
+
+clean:
+       rm -f $(SOBJS) $(OBJS)
+
+distclean:     clean
+       rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:       Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+               $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/esd/voh405/config.mk b/board/esd/voh405/config.mk
new file mode 100644 (file)
index 0000000..3041b77
--- /dev/null
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# esd VOH405 boards
+#
+
+TEXT_BASE = 0xFFFC0000
+#TEXT_BASE = 0x00FC0000
diff --git a/board/esd/voh405/flash.c b/board/esd/voh405/flash.c
new file mode 100644 (file)
index 0000000..89af119
--- /dev/null
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+       unsigned long size_b0;
+       int i;
+       uint pbcr;
+       unsigned long base_b0;
+       int size_val = 0;
+
+       /* Init: no FLASHes known */
+       for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+               flash_info[i].flash_id = FLASH_UNKNOWN;
+       }
+
+       /* Static FLASH Bank configuration here - FIXME XXX */
+
+       size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+       if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+               printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+                       size_b0, size_b0<<20);
+       }
+
+       /* Setup offsets */
+       flash_get_offsets (-size_b0, &flash_info[0]);
+
+       /* Re-do sizing to get full correct info */
+       mtdcr(ebccfga, pb0cr);
+       pbcr = mfdcr(ebccfgd);
+       mtdcr(ebccfga, pb0cr);
+       base_b0 = -size_b0;
+       switch (size_b0) {
+       case 1 << 20:
+               size_val = 0;
+               break;
+       case 2 << 20:
+               size_val = 1;
+               break;
+       case 4 << 20:
+               size_val = 2;
+               break;
+       case 8 << 20:
+               size_val = 3;
+               break;
+       case 16 << 20:
+               size_val = 4;
+               break;
+       }
+       pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+       mtdcr(ebccfgd, pbcr);
+
+       /* Monitor protection ON by default */
+       (void)flash_protect(FLAG_PROTECT_SET,
+                           -CFG_MONITOR_LEN,
+                           0xffffffff,
+                           &flash_info[0]);
+
+       flash_info[0].size = size_b0;
+
+       return (size_b0);
+}
diff --git a/board/esd/voh405/fpgadata.c b/board/esd/voh405/fpgadata.c
new file mode 100644 (file)
index 0000000..8db4a4a
--- /dev/null
@@ -0,0 +1,1179 @@
+  0x1f,0x8b,0x08,0x08,0x93,0x79,0x26,0x3f,0x00,0x03,0x76,0x6f,0x68,0x34,0x30,0x35,
+  0x5f,0x31,0x5f,0x30,0x30,0x2e,0x62,0x69,0x74,0x00,0x94,0x9b,0x7f,0x70,0x15,0xd7,
+  0x75,0xc7,0xcf,0xfe,0x78,0xd2,0xea,0xfd,0x90,0x16,0x21,0x4d,0x88,0x65,0x60,0xf5,
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+  0x46,0xd6,0x27,0x7e,0x38,0x75,0xee,0xfa,0xbb,0xad,0xaa,0xf6,0x43,0xb9,0xfe,0xf3,
+  0xbd,0xb9,0xbb,0xda,0x0f,0x57,0x8e,0xbf,0xf7,0x3e,0x8e,0x58,0x38,0xff,0xe1,0x63,
+  0xe0,0x1e,0xff,0x55,0x08,0x82,0x20,0x08,0x82,0x20,0x08,0x82,0xf8,0xdf,0x51,0xb3,
+  0x03,0xa3,0xd9,0x81,0x20,0x08,0x82,0x20,0x08,0x82,0x20,0x88,0xc3,0x51,0xb3,0x43,
+  0x81,0x66,0x07,0x82,0x20,0x08,0x82,0x20,0x08,0x82,0x20,0x0e,0x47,0xcd,0x0e,0x8e,
+  0x9a,0x1d,0xfe,0xf5,0xae,0x10,0x04,0x41,0x10,0x04,0x41,0x10,0x04,0xf1,0x17,0xf1,
+  0xe5,0xf7,0xe3,0x60,0xe9,0xa5,0x0f,0x91,0xfc,0x8e,0x88,0xed,0x83,0x38,0xf2,0xe7,
+  0x09,0xf1,0x73,0xf3,0x3e,0xec,0x58,0xd9,0x6b,0x7e,0xb8,0x75,0x70,0xdd,0x2f,0x4f,
+  0x63,0x65,0xc4,0xf1,0x33,0x01,0x00,
diff --git a/board/esd/voh405/u-boot.lds b/board/esd/voh405/u-boot.lds
new file mode 100644 (file)
index 0000000..311a5fe
--- /dev/null
@@ -0,0 +1,148 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)          }
+  .dynsym        : { *(.dynsym)                }
+  .dynstr        : { *(.dynstr)                }
+  .rel.text      : { *(.rel.text)              }
+  .rela.text     : { *(.rela.text)     }
+  .rel.data      : { *(.rel.data)              }
+  .rela.data     : { *(.rela.data)     }
+  .rel.rodata    : { *(.rel.rodata)    }
+  .rela.rodata   : { *(.rela.rodata)   }
+  .rel.got       : { *(.rel.got)               }
+  .rela.got      : { *(.rela.got)              }
+  .rel.ctors     : { *(.rel.ctors)     }
+  .rela.ctors    : { *(.rela.ctors)    }
+  .rel.dtors     : { *(.rel.dtors)     }
+  .rela.dtors    : { *(.rela.dtors)    }
+  .rel.bss       : { *(.rel.bss)               }
+  .rela.bss      : { *(.rela.bss)              }
+  .rel.plt       : { *(.rel.plt)               }
+  .rela.plt      : { *(.rela.plt)              }
+  .init          : { *(.init)  }
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within */
+    /* the sector layout of our flash chips!   XXX FIXME XXX   */
+
+    cpu/ppc4xx/start.o (.text)
+    cpu/ppc4xx/traps.o (.text)
+    cpu/ppc4xx/interrupts.o    (.text)
+    cpu/ppc4xx/serial.o        (.text)
+    cpu/ppc4xx/cpu_init.o      (.text)
+    cpu/ppc4xx/speed.o (.text)
+    cpu/ppc4xx/405gp_enet.o    (.text)
+    common/dlmalloc.o  (.text)
+    lib_generic/crc32.o                (.text)
+    lib_ppc/extable.o  (.text)
+    lib_generic/zlib.o         (.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c
new file mode 100644 (file)
index 0000000..d951138
--- /dev/null
@@ -0,0 +1,273 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+       /*
+        * IRQ 0-15  405GP internally generated; active high; level sensitive
+        * IRQ 16    405GP internally generated; active low; level sensitive
+        * IRQ 17-24 RESERVED
+        * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+        * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+        * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+        * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+        * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+        * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+        * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+        */
+       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(uicer, 0x00000000);       /* disable all ints */
+       mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+       mtdcr(uicpr, 0xFFFFFFB5);       /* set int polarities */
+       mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+       mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+       /*
+        * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+        */
+       mtebc (epcr, 0xa8400000); /* ebc always driven */
+
+       return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+       return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+       volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
+       volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
+       volatile unsigned short *lcd_reg =
+               (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 4);
+       unsigned char *dst;
+       ulong len = sizeof(fpgadata);
+       int status;
+       int index;
+       int i;
+
+       dst = malloc(CFG_FPGA_MAX_SIZE);
+       if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+               printf ("GUNZIP ERROR - must RESET board to recover\n");
+               do_reset (NULL, 0, 0, NULL);
+       }
+
+       status = fpga_boot(dst, len);
+       if (status != 0) {
+               printf("\nFPGA: Booting failed ");
+               switch (status) {
+               case ERROR_FPGA_PRG_INIT_LOW:
+                       printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+                       break;
+               case ERROR_FPGA_PRG_INIT_HIGH:
+                       printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+                       break;
+               case ERROR_FPGA_PRG_DONE:
+                       printf("(Timeout: DONE not high after programming FPGA)\n ");
+                       break;
+               }
+
+               /* display infos on fpgaimage */
+               index = 15;
+               for (i=0; i<4; i++) {
+                       len = dst[index];
+                       printf("FPGA: %s\n", &(dst[index+1]));
+                       index += len+3;
+               }
+               putc ('\n');
+               /* delayed reboot */
+               for (i=20; i>0; i--) {
+                       printf("Rebooting in %2d seconds \r",i);
+                       for (index=0;index<1000;index++)
+                               udelay(1000);
+               }
+               putc ('\n');
+               do_reset(NULL, 0, 0, NULL);
+       }
+
+       puts("FPGA:  ");
+
+       /* display infos on fpgaimage */
+       index = 15;
+       for (i=0; i<4; i++) {
+               len = dst[index];
+               printf("%s ", &(dst[index+1]));
+               index += len+3;
+       }
+       putc ('\n');
+
+       free(dst);
+
+       /*
+        * Reset FPGA via FPGA_DATA pin
+        */
+       SET_FPGA(FPGA_PRG | FPGA_CLK);
+       udelay(1000); /* wait 1ms */
+       SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+       udelay(1000); /* wait 1ms */
+
+       /*
+        * Reset external DUARTs
+        */
+       out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+       udelay(10); /* wait 10us */
+       out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+       udelay(1000); /* wait 1ms */
+
+       /*
+        * Set NAND-FLASH GPIO signals to default
+        */
+       out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+       out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+
+       /*
+        * Enable interrupts in exar duart mcr[3]
+        */
+       *duart0_mcr = 0x08;
+       *duart1_mcr = 0x08;
+
+       /*
+        * Set default contrast voltage on epson vga controller
+        */
+       *lcd_reg = 0x4848;
+
+       return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+       unsigned char str[64];
+       int i = getenv_r ("serial#", str, sizeof(str));
+
+       puts ("Board: ");
+
+       if (i == -1) {
+               puts ("### No HW ID - assuming VOH405");
+       } else {
+               puts(str);
+       }
+
+       putc ('\n');
+
+       return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+       unsigned long val;
+
+       mtdcr(memcfga, mem_mb0cf);
+       val = mfdcr(memcfgd);
+
+#if 0
+       printf("\nmb0cf=%x\n", val); /* test-only */
+       printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+       return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+       /* TODO: XXX XXX XXX */
+       printf ("test: 16 MB - ok\n");
+
+       return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#ifdef CONFIG_IDE_RESET
+void ide_set_reset(int on)
+{
+       volatile unsigned short *fpga_mode =
+               (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
+
+       /*
+        * Assert or deassert CompactFlash Reset Pin
+        */
+       if (on) {               /* assert RESET */
+               *fpga_mode &= ~(CFG_FPGA_CTRL_CF_RESET);
+       } else {                /* release RESET */
+               *fpga_mode |= CFG_FPGA_CTRL_CF_RESET;
+       }
+}
+#endif /* CONFIG_IDE_RESET */
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+
+void nand_init(void)
+{
+       nand_probe(CFG_NAND_BASE);
+       if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+               print_size(nand_dev_desc[0].totlen, "\n");
+       }
+}
+#endif