]> git.sur5r.net Git - u-boot/commitdiff
Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
authorKim Phillips <kim.phillips@freescale.com>
Wed, 16 May 2007 21:52:19 +0000 (16:52 -0500)
committerWolfgang Denk <wd@denx.de>
Wed, 16 May 2007 22:07:21 +0000 (00:07 +0200)
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
25 files changed:
board/cds/mpc8548cds/mpc8548cds.c
cpu/mpc83xx/cpu.c
cpu/mpc85xx/cpu.c
cpu/mpc86xx/cpu.c
drivers/tsec.c
include/configs/MPC8313ERDB.h
include/configs/MPC8349EMDS.h
include/configs/MPC8349ITX.h
include/configs/MPC8540ADS.h
include/configs/MPC8540EVAL.h
include/configs/MPC8541CDS.h
include/configs/MPC8544DS.h
include/configs/MPC8548CDS.h
include/configs/MPC8555CDS.h
include/configs/MPC8560ADS.h
include/configs/MPC8568MDS.h
include/configs/MPC8641HPCN.h
include/configs/PM854.h
include/configs/PM856.h
include/configs/TQM834x.h
include/configs/TQM85xx.h
include/configs/sbc8349.h
include/configs/stxgp3.h
include/configs/stxssa.h
net/eth.c

index 929ff2e66292aca149e8308c8e278c995a54e919..b7236417e8ba06f46bdd5779897d1ad6346a1f62 100644 (file)
@@ -345,23 +345,23 @@ int last_stage_init(void)
        /* This is needed to get the RGMII working for the 1.3+
         * CDS cards */
        if (get_board_version() ==  0x13) {
-               miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+               miiphy_write(CONFIG_TSEC1_NAME,
                                TSEC1_PHY_ADDR, 29, 18);
 
-               miiphy_read(CONFIG_MPC85XX_TSEC1_NAME,
+               miiphy_read(CONFIG_TSEC1_NAME,
                                TSEC1_PHY_ADDR, 30, &temp);
 
                temp = (temp & 0xf03f);
                temp |= 2 << 9;         /* 36 ohm */
                temp |= 2 << 6;         /* 39 ohm */
 
-               miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+               miiphy_write(CONFIG_TSEC1_NAME,
                                TSEC1_PHY_ADDR, 30, temp);
 
-               miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+               miiphy_write(CONFIG_TSEC1_NAME,
                                TSEC1_PHY_ADDR, 29, 3);
 
-               miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+               miiphy_write(CONFIG_TSEC1_NAME,
                                TSEC1_PHY_ADDR, 30, 0x8000);
        }
 
index e078f27a23d56e91dd8d8f59cf9e2b1552a8405a..841fe82428d4c9b5509ee3f6fe63923c02b946a6 100644 (file)
@@ -415,7 +415,7 @@ static const struct {
                "clock-frequency",
                fdt_set_busfreq
        },
-#ifdef CONFIG_MPC83XX_TSEC1
+#ifdef CONFIG_TSEC1
        {       "/" OF_SOC "/ethernet@24000,
                "mac-address",
                fdt_set_eth0
@@ -425,7 +425,7 @@ static const struct {
                fdt_set_eth0
        },
 #endif
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
        {       "/" OF_SOC "/ethernet@25000,
                "mac-address",
                fdt_set_eth1
@@ -525,7 +525,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
        if (p != NULL)
                *p = cpu_to_be32(clock);
 
-#ifdef CONFIG_MPC83XX_TSEC1
+#ifdef CONFIG_TSEC1
        p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
        if (p != NULL)
                memcpy(p, bd->bi_enetaddr, 6);
@@ -535,7 +535,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
                memcpy(p, bd->bi_enetaddr, 6);
 #endif
 
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
        p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len);
        if (p != NULL)
                memcpy(p, bd->bi_enet1addr, 6);
index 7735a52ccf169262304601ed3191054746faa4b5..1d791c9b9b3edb9baf4f11cd44c640ff69f5db83 100644 (file)
@@ -280,7 +280,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
        if (p != NULL)
                *p = cpu_to_be32(clock);
 
-#if defined(CONFIG_MPC85XX_TSEC1)
+#if defined(CONFIG_TSEC1)
        p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
        if (p)
                memcpy(p, bd->bi_enetaddr, 6);
index a33acfec4d3072ce8c240800a07a37fcd2a11090..9456471e84e7468ef7c685f0db017ecd7ec72e54 100644 (file)
@@ -278,7 +278,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
        if (p != NULL)
                *p = cpu_to_be32(clock);
 
-#if defined(CONFIG_MPC86XX_TSEC1)
+#if defined(CONFIG_TSEC1)
        p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
        if (p != NULL)
                memcpy(p, bd->bi_enetaddr, 6);
@@ -287,7 +287,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
                memcpy(p, bd->bi_enetaddr, 6);
 #endif
 
-#if defined(CONFIG_MPC86XX_TSEC2)
+#if defined(CONFIG_TSEC2)
        p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len);
        if (p != NULL)
                memcpy(p, bd->bi_enet1addr, 6);
@@ -296,7 +296,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
                memcpy(p, bd->bi_enet1addr, 6);
 #endif
 
-#if defined(CONFIG_MPC86XX_TSEC3)
+#if defined(CONFIG_TSEC3)
        p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/mac-address", &len);
        if (p != NULL)
                memcpy(p, bd->bi_enet2addr, 6);
@@ -305,7 +305,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
                memcpy(p, bd->bi_enet2addr, 6);
 #endif
 
-#if defined(CONFIG_MPC86XX_TSEC4)
+#if defined(CONFIG_TSEC4)
        p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/mac-address", &len);
        if (p != NULL)
                memcpy(p, bd->bi_enet3addr, 6);
index 790ba47c7812c179d879d59501122c91f4a2edd6..1298478704fe3cb78709855b8fbbe5078055ef52 100644 (file)
@@ -65,33 +65,31 @@ struct tsec_info_struct {
  *   FEC_PHYIDX
  */
 static struct tsec_info_struct tsec_info[] = {
-#if defined(CONFIG_MPC85XX_TSEC1) || defined(CONFIG_MPC83XX_TSEC1)
-#if defined(CONFIG_MPC8544DS)
+#if defined(CONFIG_TSEC1)
+#if defined(CONFIG_MPC8544DS) || defined(CONFIG_MPC8641HPCN)
        {TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX},
 #else
        {TSEC1_PHY_ADDR, TSEC_GIGABIT, TSEC1_PHYIDX},
 #endif
-#elif defined(CONFIG_MPC86XX_TSEC1)
-       {TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX},
-#else
        {0, 0, 0},
 #endif
-#if defined(CONFIG_MPC85XX_TSEC2) || defined(CONFIG_MPC83XX_TSEC2)
-       {TSEC2_PHY_ADDR, TSEC_GIGABIT, TSEC2_PHYIDX},
-#elif defined(CONFIG_MPC86XX_TSEC2)
+#if defined(CONFIG_TSEC2)
+#if defined(CONFIG_MPC8641HPCN)
        {TSEC2_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC2_PHYIDX},
 #else
+       {TSEC2_PHY_ADDR, TSEC_GIGABIT, TSEC2_PHYIDX},
+#endif
        {0, 0, 0},
 #endif
 #ifdef CONFIG_MPC85XX_FEC
        {FEC_PHY_ADDR, 0, FEC_PHYIDX},
 #else
-#if defined(CONFIG_MPC85XX_TSEC3) || defined(CONFIG_MPC83XX_TSEC3) || defined(CONFIG_MPC86XX_TSEC3)
+#if defined(CONFIG_TSEC3)
        {TSEC3_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC3_PHYIDX},
 #else
        {0, 0, 0},
 #endif
-#if defined(CONFIG_MPC85XX_TSEC4) || defined(CONFIG_MPC83XX_TSEC4) || defined(CONFIG_MPC86XX_TSEC4)
+#if defined(CONFIG_TSEC4)
        {TSEC4_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC4_PHYIDX},
 #else
        {0, 0, 0},
index 697631345f613caed52befce22c9495f62b9c0b3..7e1005c1ae92d0984cc506a6ff4f8b653102b878 100644 (file)
 #endif
 
 #define CONFIG_GMII                    1       /* MII PHY management */
-#define CONFIG_MPC83XX_TSEC1           1
+#define CONFIG_TSEC1           1
 
-#define CONFIG_MPC83XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC83XX_TSEC2           1
-#define CONFIG_MPC83XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2           1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR                 0x1c
 #define TSEC2_PHY_ADDR                 4
 #define TSEC1_PHYIDX                   0
index 0460be9e569cfaa6447ab3da1278c5ec01aecf08..20c6d5a365ec3bd1b010d83bdbcc0cbe46cdcf56 100644 (file)
 #endif
 
 #define CONFIG_GMII            1       /* MII PHY management */
-#define CONFIG_MPC83XX_TSEC1   1
-#define CONFIG_MPC83XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC83XX_TSEC2   1
-#define CONFIG_MPC83XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
 #define TSEC1_PHYIDX           0
index 906339e9d8827b281d58620b4fcce25c3998dac3..834934d0b6a5ac292a4f2894f53cd62ec5df0fc5 100644 (file)
@@ -374,18 +374,18 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_MII
 #define CONFIG_PHY_GIGE                /* In case CFG_CMD_MII is specified */
 
-#define CONFIG_MPC83XX_TSEC1
+#define CONFIG_TSEC1
 
-#ifdef CONFIG_MPC83XX_TSEC1
-#define CONFIG_MPC83XX_TSEC1_NAME  "TSEC0"
+#ifdef CONFIG_TSEC1
+#define CONFIG_TSEC1_NAME  "TSEC0"
 #define CFG_TSEC1_OFFSET       0x24000
 #define TSEC1_PHY_ADDR         0x1c    /* VSC8201 uses address 0x1c */
 #define TSEC1_PHYIDX           0
 #endif
 
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
 #define CONFIG_HAS_ETH1
-#define CONFIG_MPC83XX_TSEC2_NAME  "TSEC1"
+#define CONFIG_TSEC2_NAME  "TSEC1"
 #define CFG_TSEC2_OFFSET       0x25000
 #define CONFIG_UNKNOWN_TSEC    /* TSEC2 is proprietary */
 #define TSEC2_PHY_ADDR         4
@@ -628,11 +628,11 @@ boards, we say we have two, but don't display a message if we find only one. */
  */
 #define CONFIG_ENV_OVERWRITE
 
-#ifdef CONFIG_MPC83XX_TSEC1
+#ifdef CONFIG_TSEC1
 #define CONFIG_ETHADDR         00:E0:0C:00:8C:01
 #endif
 
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
 #define CONFIG_ETH1ADDR                00:E0:0C:00:8C:02
 #endif
 
index 5aeea586800eb9587ae1e289305387736753c14b..9176be388e6fdec37bfe916d06c2241d6b787617 100644 (file)
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
 #define TSEC1_PHYIDX           0
index 418a3a38e683c1fbb1b047a6c5fa0aae38454f48..b568cb4df7575d903763979acf4aa321705e4be1 100644 (file)
 #elif defined(CONFIG_TSEC_ENET)
 #define CONFIG_NET_MULTI       1
 #define CONFIG_MII             1       /* MII PHY management   */
-#define CONFIG_MPC85XX_TSEC1    1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1    1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define CONFIG_MPC85XX_FEC      1
 #define CONFIG_MPC85XX_FEC_NAME                "FEC"
 #define TSEC1_PHY_ADDR          7
index fb360d282cd4cf653d2a09a569127555172c3cd2..e047e259a5b53c00849d68b63455bec9b22eb090 100644 (file)
@@ -373,10 +373,10 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #undef CONFIG_MPC85XX_FEC
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
index 4c3430897da55d4035a27e11c1670d9af3af7419..7cd62e95a917dba6e58991484e63ec555d014fcf 100644 (file)
@@ -359,10 +359,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_MII_DEFAULT_TSEC        1       /* Allow unregistered phys */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "eTSEC1"
-#define CONFIG_MPC85XX_TSEC3   1
-#define CONFIG_MPC85XX_TSEC3_NAME      "eTSEC3"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "eTSEC1"
+#define CONFIG_TSEC3   1
+#define CONFIG_TSEC3_NAME      "eTSEC3"
 #undef CONFIG_MPC85XX_FEC
 
 #define TSEC1_PHY_ADDR         0
index 680009d6006aa366ef681a46517dcc33e8f7cd86..a0d291eef481926931c4c1e8005cca834ee396e4 100644 (file)
@@ -391,14 +391,14 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "eTSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "eTSEC1"
-#define CONFIG_MPC85XX_TSEC3   1
-#define CONFIG_MPC85XX_TSEC3_NAME      "eTSEC2"
-#undef CONFIG_MPC85XX_TSEC4
-#define CONFIG_MPC85XX_TSEC4_NAME      "eTSEC3"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "eTSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "eTSEC1"
+#define CONFIG_TSEC3   1
+#define CONFIG_TSEC3_NAME      "eTSEC2"
+#undef CONFIG_TSEC4
+#define CONFIG_TSEC4_NAME      "eTSEC3"
 #undef CONFIG_MPC85XX_FEC
 
 #define TSEC1_PHY_ADDR         0
index 4c8b4e73f3b32f267a0df0df8b022e28d9d31c45..b7e703ca183dca4f7886da15566e5a2d616a1633 100644 (file)
@@ -373,10 +373,10 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #undef CONFIG_MPC85XX_FEC
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
index 21e663768059e23496457b3c02a9267e0caa4f17..043397fc21b7b5327fabe071b3f53e7ea49517b5 100644 (file)
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #undef CONFIG_MPC85XX_FEC
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
index 3f65644fdd40197980b98f050dfc18d675921946..0ff0416138d58364be59a8bb580dd9c8222f8947 100644 (file)
@@ -353,12 +353,12 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "eTSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "eTSEC1"
-#undef  CONFIG_MPC85XX_TSEC3
-#undef  CONFIG_MPC85XX_TSEC4
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "eTSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "eTSEC1"
+#undef  CONFIG_TSEC3
+#undef  CONFIG_TSEC4
 #undef  CONFIG_MPC85XX_FEC
 
 #define TSEC1_PHY_ADDR         2
index bbe35053dd7ff3874159685a6cb52d4daf82f7e7..43a9d6ff2885780bcb2854b5783de7d4ff58e4eb 100644 (file)
 
 #define CONFIG_MII             1       /* MII PHY management */
 
-#define CONFIG_MPC86XX_TSEC1    1
-#define CONFIG_MPC86XX_TSEC1_NAME       "eTSEC1"
-#define CONFIG_MPC86XX_TSEC2    1
-#define CONFIG_MPC86XX_TSEC2_NAME       "eTSEC2"
-#define CONFIG_MPC86XX_TSEC3    1
-#define CONFIG_MPC86XX_TSEC3_NAME       "eTSEC3"
-#define CONFIG_MPC86XX_TSEC4    1
-#define CONFIG_MPC86XX_TSEC4_NAME       "eTSEC4"
+#define CONFIG_TSEC1    1
+#define CONFIG_TSEC1_NAME       "eTSEC1"
+#define CONFIG_TSEC2    1
+#define CONFIG_TSEC2_NAME       "eTSEC2"
+#define CONFIG_TSEC3    1
+#define CONFIG_TSEC3_NAME       "eTSEC3"
+#define CONFIG_TSEC4    1
+#define CONFIG_TSEC4_NAME       "eTSEC4"
 
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
index 4fb54402b1b6d5c051ecd2bc0ad8918ee55cac8f..8f130f5ccd834d05a490679c6cda83d59e024d6c 100644 (file)
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
 #define TSEC1_PHYIDX           0
index 87ab93487354dc11e78c117d992429dd218d027b..0286b53e017cc0654af0bc552cf368d85b23b61f 100644 (file)
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #undef CONFIG_MPC85XX_FEC
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
index ed0357791b457653c31f09db3fab76d756e470ce..4a5f8b67578ef147c4f999ca9829c11d697ea660 100644 (file)
@@ -248,10 +248,10 @@ extern int tqm834x_num_flash_banks;
 #define CONFIG_NET_MULTI
 #endif
 
-#define CONFIG_MPC83XX_TSEC1           1
-#define CONFIG_MPC83XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC83XX_TSEC2           1
-#define CONFIG_MPC83XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1           1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2           1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR                 2
 #define TSEC2_PHY_ADDR                 1
 #define TSEC1_PHYIDX                   0
index f45f3a2f5acaf78cf331bba7f1f74c142578815e..b0b9dd3ab8976dde1ad7177d4b1d240b7c80a8f7 100644 (file)
 #define CONFIG_NET_MULTI       1
 
 #define CONFIG_MII             1       /* MII PHY management           */
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR         2
 #define TSEC2_PHY_ADDR         1
 #define TSEC1_PHYIDX           0
index 65aac5cefd303ac7f045552c571b5bfe95043d72..e6e3866a07e0333e9772ee7f2df9d8566e8b1799 100644 (file)
 #define CONFIG_NET_MULTI       1
 #endif
 
-#define CONFIG_MPC83XX_TSEC1   1
-#define CONFIG_MPC83XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC83XX_TSEC2   1
-#define CONFIG_MPC83XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #define CONFIG_PHY_BCM5421S    1
 #define TSEC1_PHY_ADDR         0x19
 #define TSEC2_PHY_ADDR         0x1a
index 625cf20144f97b0e8d01912c65b9bffdf23f0a61..21065b9d05c243e6ffffc018ff75dd384d54fdc8 100644 (file)
 
 #define CONFIG_MII             1       /* MII PHY management           */
 
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #undef CONFIG_MPS85XX_FEC
 
 #define TSEC1_PHY_ADDR         2
index 8624f4b74b8d9ce9cc9c7f39fac5aeae4da5d405..2a341855401676a180c555665c44b42d948d874b 100644 (file)
 
 #define CONFIG_MII             1       /* MII PHY management           */
 
-#define CONFIG_MPC85XX_TSEC1   1
-#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
-#define CONFIG_MPC85XX_TSEC2   1
-#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
+#define CONFIG_TSEC1   1
+#define CONFIG_TSEC1_NAME      "TSEC0"
+#define CONFIG_TSEC2   1
+#define CONFIG_TSEC2_NAME      "TSEC1"
 #undef CONFIG_MPS85XX_FEC
 
 #define TSEC1_PHY_ADDR         2
index 0fc22115dc20772349dde0e9bd9fd7fa849314d4..ab56dcf6d5226bab287df14698c35cf20341b01c 100644 (file)
--- a/net/eth.c
+++ b/net/eth.c
@@ -173,28 +173,20 @@ int eth_initialize(bd_t *bis)
 #if defined(CONFIG_SK98)
        skge_initialize(bis);
 #endif
-#if defined(CONFIG_MPC85XX_TSEC1)
-       tsec_initialize(bis, 0, CONFIG_MPC85XX_TSEC1_NAME);
-#elif defined(CONFIG_MPC83XX_TSEC1)
-       tsec_initialize(bis, 0, CONFIG_MPC83XX_TSEC1_NAME);
+#if defined(CONFIG_TSEC1)
+       tsec_initialize(bis, 0, CONFIG_TSEC1_NAME);
 #endif
-#if defined(CONFIG_MPC85XX_TSEC2)
-       tsec_initialize(bis, 1, CONFIG_MPC85XX_TSEC2_NAME);
-#elif defined(CONFIG_MPC83XX_TSEC2)
-       tsec_initialize(bis, 1, CONFIG_MPC83XX_TSEC2_NAME);
+#if defined(CONFIG_TSEC2)
+       tsec_initialize(bis, 1, CONFIG_TSEC2_NAME);
 #endif
 #if defined(CONFIG_MPC85XX_FEC)
        tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME);
 #else
-#    if defined(CONFIG_MPC85XX_TSEC3)
-       tsec_initialize(bis, 2, CONFIG_MPC85XX_TSEC3_NAME);
-#    elif defined(CONFIG_MPC83XX_TSEC3)
-       tsec_initialize(bis, 2, CONFIG_MPC83XX_TSEC3_NAME);
+#    if defined(CONFIG_TSEC3)
+       tsec_initialize(bis, 2, CONFIG_TSEC3_NAME);
 #    endif
-#    if defined(CONFIG_MPC85XX_TSEC4)
-       tsec_initialize(bis, 3, CONFIG_MPC85XX_TSEC4_NAME);
-#    elif defined(CONFIG_MPC83XX_TSEC4)
-       tsec_initialize(bis, 3, CONFIG_MPC83XX_TSEC4_NAME);
+#    if defined(CONFIG_TSEC4)
+       tsec_initialize(bis, 3, CONFIG_TSEC4_NAME);
 #    endif
 #endif
 #if defined(CONFIG_UEC_ETH1)
@@ -203,21 +195,6 @@ int eth_initialize(bd_t *bis)
 #if defined(CONFIG_UEC_ETH2)
        uec_initialize(1);
 #endif
-#if defined(CONFIG_MPC86XX_TSEC1)
-       tsec_initialize(bis, 0, CONFIG_MPC86XX_TSEC1_NAME);
-#endif
-
-#if defined(CONFIG_MPC86XX_TSEC2)
-       tsec_initialize(bis, 1, CONFIG_MPC86XX_TSEC2_NAME);
-#endif
-
-#if defined(CONFIG_MPC86XX_TSEC3)
-       tsec_initialize(bis, 2, CONFIG_MPC86XX_TSEC3_NAME);
-#endif
-
-#if defined(CONFIG_MPC86XX_TSEC4)
-       tsec_initialize(bis, 3, CONFIG_MPC86XX_TSEC4_NAME);
-#endif
 
 #if defined(FEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
        fec_initialize(bis);