u_int32_t       wdtcr;
 };
 
+#define DV_TIMER_TCR_ENAMODE_MASK              3
+
+#define DV_TIMER_TCR_ENAMODE12_SHIFT           6
+#define DV_TIMER_TCR_CLKSRC12_SHIFT            8
+#define DV_TIMER_TCR_READRSTMODE12_SHIFT       10
+#define DV_TIMER_TCR_CAPMODE12_SHIFT           11
+#define DV_TIMER_TCR_CAPVTMODE12_SHIFT         12
+#define DV_TIMER_TCR_ENAMODE34_SHIFT           22
+#define DV_TIMER_TCR_CLKSRC34_SHIFT            24
+#define DV_TIMER_TCR_READRSTMODE34_SHIFT       26
+#define DV_TIMER_TCR_CAPMODE34_SHIFT           27
+#define DV_TIMER_TCR_CAPEVTMODE12_SHIFT                28
+
 #define DV_WDT_ENABLE_SYS_RESET                0x00020000
 #define DV_WDT_TRIGGER_SYS_RESET       0x00020002