]> git.sur5r.net Git - u-boot/commitdiff
nand_spl: remove P1023RDS_NAND support
authorMasahiro Yamada <yamada.m@jp.panasonic.com>
Wed, 4 Jun 2014 01:26:47 +0000 (10:26 +0900)
committerTom Rini <trini@ti.com>
Thu, 5 Jun 2014 21:01:58 +0000 (17:01 -0400)
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
board/freescale/p1023rds/p1023rds.c
board/freescale/p1023rds/tlb.c
boards.cfg
include/configs/P1023RDS.h
nand_spl/board/freescale/p1023rds/Makefile [deleted file]
nand_spl/board/freescale/p1023rds/nand_boot.c [deleted file]

index d8c87458e89ca3f986d6b735ce9cfb62b3ac9585..2b883c719ef31961199464fb9828b1d724948982 100644 (file)
@@ -182,11 +182,6 @@ void ft_board_setup(void *blob, bd_t *bd)
 
        fdt_fixup_memory(blob, (u64)base, (u64)size);
 
-       /* By default NOR is on, and NAND is disabled */
-#ifdef CONFIG_NAND_U_BOOT
-       do_fixup_by_path_string(blob, "nor_flash", "status", "disabled");
-       do_fixup_by_path_string(blob, "nand_flash", "status", "okay");
-#endif
 #ifdef CONFIG_HAS_FSL_DR_USB
        fdt_fixup_dr_usb(blob, bd);
 #endif
index 8b2bf50799fa19e91c0f218f80553f48628e1ed0..3c92c14ae369608026570478d4b160c43f76a1f3 100644 (file)
@@ -36,7 +36,6 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 1, BOOKE_PAGESZ_4M, 1),
 
-#ifndef CONFIG_NAND_SPL
        /* *W*G* - BCSR and NOR flash on local bus*/
        /* This will be changed to *I*G* after relocation to RAM. */
        SET_TLB_ENTRY(1, CONFIG_SYS_BCSR_BASE, CONFIG_SYS_BCSR_BASE_PHYS,
@@ -79,7 +78,6 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 10, BOOKE_PAGESZ_1M, 1),
-#endif
 
        /* *I*G - NAND */
        SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
index f1e9e032a26e01e724410756a7685e1833d7b823..fb0a093069701e269903a0173e306456906e7d3e 100644 (file)
@@ -833,7 +833,6 @@ Active  powerpc     mpc85xx        -           freescale       p1022ds
 Active  powerpc     mpc85xx        -           freescale       p1022ds             P1022DS_SPIFLASH                      P1022DS:SPIFLASH                                                                                                                  Timur Tabi <timur@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       p1023rdb            P1023RDB                              -                                                                                                                                 -
 Active  powerpc     mpc85xx        -           freescale       p1023rds            P1023RDS                              -                                                                                                                                 Roy Zang <tie-fei.zang@freescale.com>
-Active  powerpc     mpc85xx        -           freescale       p1023rds            P1023RDS_NAND                         P1023RDS:NAND                                                                                                                     Roy Zang <tie-fei.zang@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       p1_p2_rdb           P1011RDB                              P1_P2_RDB:P1011RDB                                                                                                                -
 Active  powerpc     mpc85xx        -           freescale       p1_p2_rdb           P1011RDB_36BIT                        P1_P2_RDB:P1011RDB,36BIT                                                                                                          -
 Active  powerpc     mpc85xx        -           freescale       p1_p2_rdb           P1011RDB_36BIT_SDCARD                 P1_P2_RDB:P1011RDB,36BIT,SDCARD                                                                                                   -
index 8601eec85ea9c83110bb4888c6de98337bc5d457..ac75b9c5fb6e2256d763cd28a241924d23d5fbef 100644 (file)
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#ifdef CONFIG_NAND
-#define CONFIG_NAND_U_BOOT
-#define CONFIG_RAMBOOT_NAND
-#endif
-
-#ifdef CONFIG_NAND_U_BOOT
-#define CONFIG_SYS_TEXT_BASE_SPL       0xfff00000
-#define CONFIG_SYS_TEXT_BASE           0x11001000
-
-#ifdef CONFIG_NAND_SPL
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
-#else
-#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
-#endif /* CONFIG_NAND_SPL */
-#endif
-
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE   0xeff40000
 #endif
@@ -162,7 +145,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_BCSR_BASE           0xe0000000 /* start of on board FPGA */
 #define CONFIG_SYS_BCSR_BASE_PHYS      CONFIG_SYS_BCSR_BASE
 
-#ifndef CONFIG_NAND
 #define CONFIG_SYS_FLASH_BASE          0xee000000 /* start of FLASH 32M */
 
 #define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
@@ -179,11 +161,8 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_MAX_FLASH_SECT      512     /* sectors per device */
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-#else
-#define CONFIG_SYS_NO_FLASH
-#endif
 
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
+#if defined(CONFIG_SYS_SPL)
 #define CONFIG_SYS_RAMBOOT
 #endif
 
@@ -239,17 +218,6 @@ extern unsigned long get_clock_freq(void);
                                | OR_FCM_TRLX \
                                | OR_FCM_EHTR)
 
-#ifdef CONFIG_RAMBOOT_NAND
-/* NAND Base Address */
-#define CONFIG_SYS_BR0_PRELIM  CONFIG_SYS_NAND_BR_PRELIM
-#define CONFIG_SYS_OR0_PRELIM  CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
-/* chip select 1 - BCSR */
-#define CONFIG_SYS_BR1_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \
-                               | BR_MS_GPCM | BR_PS_8 | BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \
-                               | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \
-                               | OR_GPCM_EAD)
-#else
 #define CONFIG_SYS_BR0_PRELIM  CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 #define CONFIG_SYS_OR0_PRELIM  CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 /* chip select 1 - BCSR */
@@ -258,7 +226,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_OR1_PRELIM  (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \
                                | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \
                                | OR_GPCM_EAD)
-#endif
 
 /* Serial Port
  * open - index 2
@@ -381,15 +348,9 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_ENV_OVERWRITE
 
 #if defined(CONFIG_SYS_RAMBOOT)
-#if defined(CONFIG_RAMBOOT_NAND)
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_SIZE                CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET      ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
-#else
 #define CONFIG_ENV_IS_NOWHERE  /* Store ENV in memory only */
 #define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - 0x4000)
 #define CONFIG_ENV_SIZE                0x2000
-#endif
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
@@ -496,15 +457,10 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_PHY_MARVELL
 #endif
 
-#ifndef CONFIG_NAND
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #define CONFIG_SYS_FMAN_FW_ADDR        0xEFF00000
-#else
-#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_FMAN_FW_ADDR        0x1f00000
-#endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
 #define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
diff --git a/nand_spl/board/freescale/p1023rds/Makefile b/nand_spl/board/freescale/p1023rds/Makefile
deleted file mode 100644 (file)
index fba9f93..0000000
+++ /dev/null
@@ -1,87 +0,0 @@
-#
-# Copyright 2010-2011 Freescale Semiconductor, Inc.
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-PAD_TO := 0xfff01000
-
-nandobj        := $(objtree)/nand_spl/
-
-LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
-LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
-               $(LDFLAGS) $(LDFLAGS_FINAL)
-asflags-y += -DCONFIG_NAND_SPL
-ccflags-y += -DCONFIG_NAND_SPL
-
-SOBJS  = start.o resetvec.o
-COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
-         nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
-
-OBJS   := $(addprefix $(obj)/,$(SOBJS) $(COBJS))
-__OBJS := $(SOBJS) $(COBJS)
-LNDIR  := $(nandobj)board/$(BOARDDIR)
-
-targets += $(__OBJS)
-
-all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-       $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:      $(nandobj)u-boot-spl
-       $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
-
-$(nandobj)u-boot-spl:  $(OBJS) $(nandobj)u-boot-nand_spl.lds
-       cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-               -Map $(nandobj)u-boot-spl.map -o $@
-
-$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
-       $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
-               -ansi -D__ASSEMBLY__ -P - <$< >$@
-
-# create symbolic links for common files
-
-$(obj)/cache.c:
-       @rm -f $@
-       ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
-
-$(obj)/cpu_init_early.c:
-       @rm -f $@
-       ln -sf $(srctree)/$(CPUDIR)/cpu_init_early.c $@
-
-$(obj)/spl_minimal.c:
-       @rm -f $@
-       ln -sf $(srctree)/$(CPUDIR)/spl_minimal.c $@
-
-$(obj)/fsl_law.c:
-       @rm -f $@
-       ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
-
-$(obj)/law.c:
-       @rm -f $@
-       ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
-
-$(obj)/nand_boot_fsl_elbc.c:
-       @rm -f $@
-       ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
-
-$(obj)/ns16550.c:
-       @rm -f $@
-       ln -sf $(srctree)/drivers/serial/ns16550.c $@
-
-$(obj)/resetvec.S:
-       @rm -f $@
-       ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
-
-$(obj)/start.S:
-       @rm -f $@
-       ln -sf $(srctree)/$(CPUDIR)/start.S $@
-
-$(obj)/tlb.c:
-       @rm -f $@
-       ln -sf $(srctree)/$(CPUDIR)/tlb.c $@
-
-$(obj)/tlb_table.c:
-       @rm -f $@
-       ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@
diff --git a/nand_spl/board/freescale/p1023rds/nand_boot.c b/nand_spl/board/freescale/p1023rds/nand_boot.c
deleted file mode 100644 (file)
index d9afa6d..0000000
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
- * Author: Roy Zang <tie-fei.zang@freescale.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <ns16550.h>
-#include <asm/io.h>
-#include <nand.h>
-#include <asm/fsl_law.h>
-#include <fsl_ddr_sdram.h>
-#include <asm/global_data.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* Fixed sdram init -- doesn't use serial presence detect. */
-void sdram_init(void)
-{
-       struct ccsr_ddr __iomem *ddr =
-               (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
-
-       set_next_law(0, LAW_SIZE_2G, LAW_TRGT_IF_DDR_1);
-
-       __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);
-       __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);
-       __raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds);
-       __raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config);
-       __raw_writel(CONFIG_SYS_DDR_TIMING_3, &ddr->timing_cfg_3);
-       __raw_writel(CONFIG_SYS_DDR_TIMING_0, &ddr->timing_cfg_0);
-       __raw_writel(CONFIG_SYS_DDR_TIMING_1, &ddr->timing_cfg_1);
-       __raw_writel(CONFIG_SYS_DDR_TIMING_2, &ddr->timing_cfg_2);
-       __raw_writel(CONFIG_SYS_DDR_CONTROL2, &ddr->sdram_cfg_2);
-       __raw_writel(CONFIG_SYS_DDR_MODE_1, &ddr->sdram_mode);
-       __raw_writel(CONFIG_SYS_DDR_MODE_2, &ddr->sdram_mode_2);
-       __raw_writel(CONFIG_SYS_DDR_INTERVAL, &ddr->sdram_interval);
-       __raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init);
-       __raw_writel(CONFIG_SYS_DDR_CLK_CTRL, &ddr->sdram_clk_cntl);
-       __raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4);
-       __raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5);
-       __raw_writel(CONFIG_SYS_DDR_ZQ_CNTL, &ddr->ddr_zq_cntl);
-       __raw_writel(CONFIG_SYS_DDR_WRLVL_CNTL, &ddr->ddr_wrlvl_cntl);
-       __raw_writel(CONFIG_SYS_DDR_CDR_1, &ddr->ddr_cdr1);
-       __raw_writel(CONFIG_SYS_DDR_CDR_2, &ddr->ddr_cdr2);
-       /* Set, but do not enable the memory */
-       __raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg);
-
-       asm volatile("sync;isync");
-       udelay(500);
-
-       /* Let the controller go */
-       out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN);
-}
-
-void board_init_f(ulong bootflag)
-{
-       u32 plat_ratio;
-       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
-
-       /* initialize selected port with appropriate baud rate */
-       plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
-       plat_ratio >>= 1;
-       gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
-       NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
-                       gd->bus_clk / 16 / CONFIG_BAUDRATE);
-
-       puts("\nNAND boot... ");
-       /* Initialize the DDR3 */
-       sdram_init();
-       /* copy code to RAM and jump to it - this should not return */
-       /* NOTE - code has to be copied out of NAND buffer before
-        * other blocks can be read.
-        */
-       relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
-                       CONFIG_SYS_NAND_U_BOOT_RELOC);
-}
-
-void board_init_r(gd_t *gd, ulong dest_addr)
-{
-       nand_boot();
-}
-
-void putc(char c)
-{
-       if (c == '\n')
-               NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
-
-       NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
-}
-
-void puts(const char *str)
-{
-       while (*str)
-               putc(*str++);
-}