Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF
size for HAB support boot on mx7ulp.
Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build
secure uboot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
enable_usboh3_clk(1);
}
+#ifdef CONFIG_SECURE_BOOT
+void hab_caam_clock_enable(unsigned char enable)
+{
+ if (enable)
+ pcc_clock_enable(PER_CLK_CAAM, true);
+ else
+ pcc_clock_enable(PER_CLK_CAAM, false);
+}
+#endif
+
/*
* Dump some core clockes.
*/
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
+#include <asm/imx-common/hab.h>
static char *get_reset_cause(char *);
+#if defined(CONFIG_SECURE_BOOT)
+struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
+ .bank = 29,
+ .word = 6,
+};
+#endif
+
u32 get_cpu_rev(void)
{
/* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */
#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
#define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
#define IS_HAB_ENABLED_BIT \
- (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2)
+ (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
+ (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
/*
* +------------+ 0x0 (DDR_UIMAGE_START) -
#endif
void init_clk_usdhc(u32 index);
void clock_init(void);
+void hab_caam_clock_enable(unsigned char enable);
#endif