]> git.sur5r.net Git - u-boot/commitdiff
rockchip: jerry: Enable the Chrome OS EC
authorSimon Glass <sjg@chromium.org>
Fri, 22 Jan 2016 02:44:13 +0000 (19:44 -0700)
committerSimon Glass <sjg@chromium.org>
Fri, 22 Jan 2016 03:42:36 +0000 (20:42 -0700)
Turn on the EC and enable the keyboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/rk3288-veyron-chromebook.dtsi
configs/chromebook_jerry_defconfig
include/configs/chromebook_jerry.h
include/configs/firefly-rk3288.h
include/configs/rk3288_common.h

index 6d619c93bbe85fff1613b60dc4f438960e1e3bb5..bbbc2f408d632a6d6e3d65ea2903bece8db1ddf3 100644 (file)
 
 &spi0 {
        status = "okay";
+       spi-activate-delay = <100>;
+       spi-max-frequency = <3000000>;
+       spi-deactivate-delay = <200>;
 
        cros_ec: ec@0 {
                compatible = "google,cros-ec-spi";
                spi-max-frequency = <3000000>;
                interrupt-parent = <&gpio7>;
                interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+               ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
                pinctrl-names = "default";
                pinctrl-0 = <&ec_int>;
                reg = <0>;
index ceec6f544bfd5515eee9c7abcd29be7b6d3732ee..b2672b868d470db47d520c4d8b7f57214791d7de 100644 (file)
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_TARGET_CHROMEBOOK_JERRY=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DM_KEYBOARD=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
@@ -21,7 +22,13 @@ CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_MUX=y
+CONFIG_CROS_EC_KEYB=y
+CONFIG_CMD_CROS_EC=y
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_RESET=y
 CONFIG_DM_MMC=y
@@ -31,6 +38,7 @@ CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_ROCKCHIP_PINCTRL=y
 CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK808=y
 CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_RK808=y
index 78c06afd1654e6bee8fe291c7e4ccbf4ceed5c6c..6e32f2ccad4d3c1b830c57b502909ae498f09c8d 100644 (file)
@@ -7,6 +7,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+               "stdin=serial,cros-ec-keyb\0" \
+               "stdout=serial\0" \
+               "stderr=serial\0"
+
 #include <configs/rk3288_common.h>
 
 #define CONFIG_ENV_IS_NOWHERE
@@ -17,4 +22,6 @@
 
 #undef CONFIG_SPL_GPIO_SUPPORT
 
+#define CONFIG_KEYBOARD
+
 #endif
index 4c5c4ddefd5b21e2b185cc33bde08727384e47b0..8ac6521050bd32d623c80ef9deb894cc58c27d2c 100644 (file)
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define ROCKCHIP_DEVICE_SETTINGS
+
 #include <configs/rk3288_common.h>
 
 #define CONFIG_SPL_MMC_SUPPORT
index f47573b25c49cf8095c2f12c8b315a8f8fde53ab..ebddfb02676f9f3316db22c0abf7146d9105ccbc 100644 (file)
 #define CONFIG_ROCKCHIP_COMMON
 #define CONFIG_SPL_ROCKCHIP_COMMON
 
+#define CONFIG_SILENT_CONSOLE
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_SYS_CONSOLE_IS_IN_ENV
+# define CONFIG_CONSOLE_MUX
+#endif
+
 /* MMC/SD IP block */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
        "fdt_high=0x1fffffff\0" \
        "initrd_high=0x1fffffff\0" \
        ENV_MEM_LAYOUT_SETTINGS \
+       ROCKCHIP_DEVICE_SETTINGS \
        BOOTENV
 #endif