]> git.sur5r.net Git - u-boot/commitdiff
arm, arm926ejs: Do cpu critical inits only for boards that require it
authorChristian Riesch <christian.riesch@omicron.at>
Thu, 2 Feb 2012 00:44:37 +0000 (00:44 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 12 Feb 2012 09:11:33 +0000 (10:11 +0100)
This patch reverts commit ca4b55800ed74207c35271bf7335a092d4955416
"arm, arm926ejs: always do cpu critical inits" since it impacts all
arm926ejs based configurations and caused problems, e.g., with
the hawkboard.

Instead the patch removes the CONFIG_SKIP_LOWLEVEL_INIT defines
from the board configurations that need low level initialization.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
arch/arm/cpu/arm926ejs/start.S
include/configs/cam_enc_4xx.h
include/configs/da850evm.h
include/configs/enbw_cmc.h

index 6a09c028e45357f68cbac3aa3502c3a5af9a737a..bb4d00bf3fd5b67d803ea89f150fdeb8213485a5 100644 (file)
@@ -194,7 +194,9 @@ reset:
         * we do sys-critical inits only at reboot,
         * not when booting from ram!
         */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
        bl      cpu_init_crit
+#endif
 
 /* Set stackpointer in internal RAM to call board_init_f */
 call_board_init_f:
@@ -353,6 +355,7 @@ _dynsym_start_ofs:
  *
  *************************************************************************
  */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
        /*
         * flush v4 I/D caches
@@ -371,15 +374,14 @@ cpu_init_crit:
        orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
        mcr     p15, 0, r0, c1, c0, 0
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
        /*
         * Go setup Memory and board specific bits prior to relocation.
         */
        mov     ip, lr          /* perserve link reg across call */
        bl      lowlevel_init   /* go setup pll,mux,memory */
        mov     lr, ip          /* restore link */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
        mov     pc, lr          /* back to my caller */
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 
 #ifndef CONFIG_SPL_BUILD
 /*
index 79a8611f821b755c79f1b84f6f49a72a40d204b0..0fee53f750c58c84279830431fde3c412660e7ad 100644 (file)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0xa0000
 
-/*
- * U-Boot is a 3rd stage loader and if booting with spl, cpu setup is
- * done in board_init_f from c code.
- */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
 /* for UBL header */
 #define CONFIG_SYS_UBL_BLOCK           (CONFIG_SYS_NAND_PAGE_SIZE)
 
index f32bd34add328cc429dbea76321e1e359350b69d..51a5a09a7272ffc67da7a4151e08dccc4d80d27b 100644 (file)
@@ -42,7 +42,6 @@
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
 #define CONFIG_SYS_HZ                  1000
-#define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_TEXT_BASE           0xc1080000
 
 /*
index 9fd6a4f183a190edd81ffbe403c7774f8c5aab73..98421795b4e31b6175ab1b5140d937034fb43dec 100644 (file)
@@ -45,7 +45,6 @@
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
 #define CONFIG_SYS_HZ                  1000
-#define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_DA850_LOWLEVEL
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_DA8XX_GPIO