Wait data transfer till the data end bit other than the data block end
bit is set.
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
        if (data->flags & MMC_DATA_WRITE)
                return UNUSABLE_ERR;
 #ifndef RSI_BLKSZ
-       data_ctl |= ((ffs(data_size) - 1) << 4);
+       data_ctl |= ((ffs(data->blocksize) - 1) << 4);
 #else
-       bfin_write_SDH_BLK_SIZE(data_size);
+       bfin_write_SDH_BLK_SIZE(data->blocksize);
 #endif
        data_ctl |= DTX_DIR;
        bfin_write_SDH_DATA_CTL(data_ctl);
                do {
                        udelay(1);
                        status = bfin_read_SDH_STATUS();
-               } while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN)));
+               } while (!(status & (DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL |
+                        RX_OVERRUN)));
 
                if (status & DAT_TIME_OUT) {
                        bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT);