EXYNOS: definitions of system resgister and power management registers.

This is definitions of system registers and power mananagement registers for EXYNOS SoC.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/cpu/armv7/exynos/Makefile b/arch/arm/cpu/armv7/exynos/Makefile
index 124c38018c85b9b9806c5d7830a75e349bba6ecf..90ec2bd40486f8abd7dfba0a466fcf3bb28a08a8 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(SOC).o
 
-COBJS  += clock.o soc.o
+COBJS  += clock.o power.o soc.o system.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))

diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c
new file mode 100644 (file)
index 0000000..c765304
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/power.h>
+
+static void exynos4_mipi_phy_control(unsigned int dev_index,
+                                       unsigned int enable)
+{
+       struct exynos4_power *pmu =
+           (struct exynos4_power *)samsung_get_base_power();
+       unsigned int addr, cfg = 0;
+
+       if (dev_index == 0)
+               addr = (unsigned int)&pmu->mipi_phy0_control;
+       else
+               addr = (unsigned int)&pmu->mipi_phy1_control;
+
+
+       cfg = readl(addr);
+       if (enable)
+               cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+       else
+               cfg &= ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+
+       writel(cfg, addr);
+}
+
+void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)
+{
+       if (cpu_is_exynos4())
+               exynos4_mipi_phy_control(dev_index, enable);
+}

diff --git a/arch/arm/cpu/armv7/exynos/system.c b/arch/arm/cpu/armv7/exynos/system.c
new file mode 100644 (file)
index 0000000..6c34730
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/system.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/system.h>
+
+static void exynos4_set_system_display(void)
+{
+       struct exynos4_sysreg *sysreg =
+           (struct exynos4_sysreg *)samsung_get_base_sysreg();
+       unsigned int cfg = 0;
+
+       /*
+        * system register path set
+        * 0: MIE/MDNIE
+        * 1: FIMD Bypass
+        */
+       cfg = readl(&sysreg->display_ctrl);
+       cfg |= (1 << 1);
+       writel(cfg, &sysreg->display_ctrl);
+}
+
+void set_system_display_ctrl(void)
+{
+       if (cpu_is_exynos4())
+               exynos4_set_system_display();
+}

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
index 89f2c2e3e904380b508b44e25d6fa7744a008b12..ac4ddc7354f644016a67e1428824774a84e33ad3 100644 (file)
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -29,6 +29,7 @@
 /* EXYNOS4 */
 #define EXYNOS4_GPIO_PART3_BASE                0x03860000
 #define EXYNOS4_PRO_ID                 0x10000000
+#define EXYNOS4_SYSREG_BASE            0x10010000
 #define EXYNOS4_POWER_BASE             0x10020000
 #define EXYNOS4_SWRESET                        0x10020400
 #define EXYNOS4_CLOCK_BASE             0x10030000
@@ -40,6 +41,7 @@
 #define EXYNOS4_GPIO_PART2_BASE                0x11000000
 #define EXYNOS4_GPIO_PART1_BASE                0x11400000
 #define EXYNOS4_FIMD_BASE              0x11C00000
+#define EXYNOS4_MIPI_DSIM_BASE         0x11C80000
 #define EXYNOS4_USBOTG_BASE            0x12480000
 #define EXYNOS4_MMC_BASE               0x12510000
 #define EXYNOS4_SROMC_BASE             0x12570000
@@ -65,6 +67,7 @@
 #define EXYNOS5_GPIO_PART3_BASE                0x10D10000
 #define EXYNOS5_DMC_CTRL_BASE          0x10DD0000
 #define EXYNOS5_GPIO_PART1_BASE                0x11400000
+#define EXYNOS5_MIPI_DSIM_BASE         0x11D00000
 #define EXYNOS5_MMC_BASE               0x12200000
 #define EXYNOS5_SROMC_BASE             0x12250000
 #define EXYNOS5_USBOTG_BASE            0x12480000
@@ -127,7 +130,9 @@ static inline unsigned int samsung_get_base_##device(void)  \
 
 SAMSUNG_BASE(adc, ADC_BASE)
 SAMSUNG_BASE(clock, CLOCK_BASE)
+SAMSUNG_BASE(sysreg, SYSREG_BASE)
 SAMSUNG_BASE(fimd, FIMD_BASE)
+SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE)
 SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
 SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
 SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE)

diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h
index fb442f7f1fdbfcae97803116be89dd7f558c67e4..6444fd04ec12a46bec9cb6a6917e1be664f70285 100644 (file)
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -227,4 +227,10 @@ struct exynos4_power {
 };
 #endif /* __ASSEMBLY__ */
 
+void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable);
+
+#define EXYNOS_MIPI_PHY_ENABLE         (1 << 0)
+#define EXYNOS_MIPI_PHY_SRESETN                (1 << 1)
+#define EXYNOS_MIPI_PHY_MRESETN                (1 << 2)
+
 #endif

diff --git a/arch/arm/include/asm/arch-exynos/system.h b/arch/arm/include/asm/arch-exynos/system.h
new file mode 100644 (file)
index 0000000..c85f949
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/system.h
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee <dh09.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_SYSTEM_H_
+#define __ASM_ARM_ARCH_SYSTEM_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_sysreg {
+       unsigned char   res1[0x210];
+       unsigned int    display_ctrl;
+       unsigned int    display_ctrl2;
+       unsigned int    camera_control;
+       unsigned int    audio_endian;
+       unsigned int    jtag_con;
+};
+
+struct exynos5_sysreg {
+       unsigned char   res1[0x214];
+       unsigned int    disp1blk_cfg;
+       unsigned int    disp2blk_cfg;
+       unsigned int    hdcp_e_fuse;
+       unsigned int    gsclblk_cfg0;
+       unsigned int    gsclblk_cfg1;
+       unsigned int    reserved;
+       unsigned int    ispblk_cfg;
+       unsigned int    usb20phy_cfg;
+       unsigned int    mipi_dphy;
+       unsigned int    dptx_dphy;
+       unsigned int    phyclk_sel;
+};
+#endif
+
+void set_system_display_ctrl(void);
+
+#endif /* _EXYNOS4_SYSTEM_H */