--- /dev/null
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o
+SOBJS :=
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+/*
+ * Copyright (C) 2009 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emif_defs.h>
+#include <asm/arch/nand_defs.h>
+#include "../common/misc.h"
+
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * With the DM355 EVM, u-boot is *always* a third stage loader,
+ * unless a JTAG debugger handles the first two stages:
+ *
+ * - 1st stage is ROM Boot Loader (RBL), which searches for a
+ * second stage loader in one of three places based on SW7:
+ * NAND (with MMC/SD fallback), MMC/SD, or UART.
+ *
+ * - 2nd stage is User Boot Loader (UBL), using at most 30KB
+ * of on-chip SRAM, responsible for lowlevel init, and for
+ * loading the third stage loader into DRAM.
+ *
+ * - 3rd stage, that's us!
+ */
+
+int board_init(void)
+{
+ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM;
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ /* We expect the UBL to have handled "lowlevel init", which
+ * involves setting up at least:
+ * - clocks
+ * + PLL1 (for ARM and peripherals) and PLL2 (for DDR)
+ * + clock divisors for those PLLs
+ * + LPSC_DDR module enabled
+ * + LPSC_TIMER0 module (still) enabled
+ * - EMIF
+ * + DDR init and timings
+ * + AEMIF timings (for NAND and DM9000)
+ * - pinmux
+ *
+ * Some of that is repeated here, mostly as a precaution.
+ */
+
+ /* AEMIF: Some "address" lines are available as GPIOs. A3..A13
+ * could be too if we used A12 as a GPIO during NAND chipselect
+ * (and Linux did too), letting us control the LED on A7/GPIO61.
+ */
+ REG(PINMUX2) = 0x0c08;
+
+ /* UART0 may still be in SyncReset if we didn't boot from UART */
+ davinci_enable_uart0();
+
+ /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */
+ lpsc_on(DAVINCI_LPSC_TPCC);
+ lpsc_on(DAVINCI_LPSC_TPTC0);
+ lpsc_on(DAVINCI_LPSC_TPTC1);
+
+ return 0;
+}
+
+#ifdef CONFIG_NAND_DAVINCI
+
+static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip)
+{
+ struct nand_chip *this = mtd->priv;
+ u32 wbase = (u32) this->IO_ADDR_W;
+ u32 rbase = (u32) this->IO_ADDR_R;
+
+ if (chip == 1) {
+ __set_bit(14, &wbase);
+ __set_bit(14, &rbase);
+ } else {
+ __clear_bit(14, &wbase);
+ __clear_bit(14, &rbase);
+ }
+ this->IO_ADDR_W = (void *)wbase;
+ this->IO_ADDR_R = (void *)rbase;
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ davinci_nand_init(nand);
+ nand->select_chip = nand_dm355evm_select_chip;
+ return 0;
+}
+
+#endif
--- /dev/null
+/*
+ * Copyright (C) 2009 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/* Spectrum Digital TMS320DM355 EVM board */
+#define DAVINCI_DM355EVM
+
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
+#define CONFIG_SKIP_RELOCATE_UBOOT
+#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_DISPLAY_CPUINFO
+
+/* SoC Configuration */
+#define CONFIG_ARM926EJS /* arm926ejs CPU */
+#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
+#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SOC_DM355
+
+/* Memory Info */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM_1 0x80000000
+#define PHYS_SDRAM_1_SIZE SZ_128M
+
+/* Serial Driver info: UART0 for console */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE -4
+#define CONFIG_SYS_NS16550_COM1 0x01c20000
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+
+/* Ethernet: external DM9000 */
+#define CONFIG_DRIVER_DM9000 1
+#define CONFIG_DM9000_BASE 0x04014000
+#define DM9000_IO CONFIG_DM9000_BASE
+#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
+
+/* I2C */
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CONFIG_SYS_I2C_SPEED 400000
+#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
+
+/* NAND: socketed, two chipselects, normally 2 GBytes */
+/* NYET -- #define CONFIG_NAND_DAVINCI */
+#define CONFIG_SYS_NAND_HW_ECC
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+
+#define CONFIG_SYS_NAND_LARGEPAGE
+#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
+/* socket has two chipselects, nCE0 gated by address BIT(14) */
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_MAX_CHIPS 2
+
+/* USB: OTG connector */
+/* NYET -- #define CONFIG_USB_DAVINCI */
+
+/* U-Boot command configuration */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+
+#ifdef CONFIG_NAND_DAVINCI
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_UBI
+#define CONFIG_RBTREE
+#endif
+
+/* TEMPORARY -- no safe place to save env, yet */
+#define CONFIG_ENV_IS_NOWHERE
+#undef CONFIG_CMD_SAVEENV
+
+#ifdef CONFIG_USB_DAVINCI
+#define CONFIG_MUSB_HCD
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#else
+#undef CONFIG_MUSB_HCD
+#undef CONFIG_CMD_USB
+#undef CONFIG_USB_STORAGE
+#endif
+
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/* U-Boot general configuration */
+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_ENV_SIZE SZ_16K
+
+/* NYET -- #define CONFIG_BOOTDELAY 5 */
+#define CONFIG_BOOTCOMMAND \
+ "dhcp;bootm"
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200n8 " \
+ "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
+
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_TIMESTAMP
+
+#define CONFIG_NET_RETRY_COUNT 10
+
+/* U-Boot memory configuration */
+#define CONFIG_STACKSIZE SZ_256K /* regular stack */
+#define CONFIG_SYS_MALLOC_LEN SZ_512K /* malloc() arena */
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
+#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
+#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
+
+/* Linux interfacing */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
+#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
+
+
+/* NAND configuration ... socketed with two chipselects. It normally comes
+ * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
+ * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
+ * pretty much demands the 4-bit ECC support.) You can of course swap in
+ * other parts, including small page ones.
+ *
+ * This presents a single read-only partition for all bootloader stuff.
+ * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
+ * some extra space to help cope with bad blocks in that data. Linux
+ * shouldn't care about its detailed layout, and will probably want to use
+ * UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to
+ * override this default partitioning using MTDPARTS and cmdlinepart.
+ */
+#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
+
+#ifdef CONFIG_SYS_NAND_LARGEPAGE
+/* Use same layout for 128K/256K blocks; allow some bad blocks */
+#define PART_BOOT "2m(bootloader)ro,"
+#else
+/* Assume 16K erase blocks; allow a few bad ones. */
+#define PART_BOOT "512k(bootloader)ro,"
+#endif
+
+#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
+#define PART_REST "-(filesystem)"
+
+#define MTDPARTS_DEFAULT \
+ "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
+
+#endif /* __CONFIG_H */
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