]> git.sur5r.net Git - u-boot/commitdiff
mvebu: a38x: Force receiver detected on PCIe lanes
authorRabeeh Khoury <rabeeh@solid-run.com>
Sun, 27 May 2018 15:34:08 +0000 (18:34 +0300)
committerStefan Roese <sr@denx.de>
Tue, 5 Jun 2018 05:25:42 +0000 (07:25 +0200)
Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.

An example of such a card is WLE900VX.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h

index 13553cf96008864db115d35d6debcdb22f2dbda1..33e70569bc480a459099c39256a67ca97284dcb9 100644 (file)
@@ -597,6 +597,8 @@ struct op_params pex_electrical_config_serdes_rev2_params[] = {
        {LANE_CFG4_REG, 0x800, 0x8, {0x8}, 0, 0},
        /* tximpcal_th and rximpcal_th */
        {VTHIMPCAL_CTRL_REG, 0x800, 0xff00, {0x3000}, 0, 0},
+       /* Force receiver detected */
+       {LANE_CFG0_REG, 0x800, 0x8000, {0x8000}, 0, 0},
 };
 
 /* PEX - configuration seq for REF_CLOCK_25MHz */
index 953445b7d7aeb9bd02eca3d8c42631529e1d0382..50b235826659d500bb3d30604d536d924293dd03 100644 (file)
@@ -71,6 +71,7 @@
 #define RX_REG3                                0xa0188
 #define PCIE_REG1                      0xa0288
 #define PCIE_REG3                      0xa0290
+#define LANE_CFG0_REG                  0xa0600
 #define LANE_CFG1_REG                  0xa0604
 #define LANE_CFG4_REG                  0xa0620
 #define LANE_CFG5_REG                  0xa0624