ldr r1, VAL_MPU_CNTL_TIMER
str r1, [r0]
+ /*
+ * Setup a temporary stack
+ */
+ ldr sp, SRAM_STACK
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
+
+ /*
+ * Save the old lr(passed in ip) and the current lr to stack
+ */
+ push {ip, lr}
+
+ /*
+ * go setup pll, mux, memory
+ */
+ bl s_init
+ pop {ip, pc}
+
/* back to arch calling code */
mov pc, lr
VAL_ARM_IDLECT3:
.word 0x00000015
+SRAM_STACK:
+ .word CONFIG_SYS_INIT_SP_ADDR
+
/* command values */
.equ CMD_SDRAM_NOP, 0x00000000
.equ CMD_SDRAM_PRECHARGE, 0x00000001
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x10000100;
+ flash__init();
+ ether__init();
+
+ return 0;
+}
+
+void s_init(void)
+{
/* Configure MUX settings */
set_muxconf_regs ();
peripheral_power_enable ();
* ... rkw ...
*/
icache_enable ();
-
- flash__init ();
- ether__init ();
- return 0;
}
/******************************
#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR PHYS_SRAM
+#define CONFIG_SYS_INIT_RAM_SIZE (250 * 1024)
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE)
#endif /* __CONFIG_H */