BIT(uart_enable_bit));
if (plat->uart_info->has_overrun_disable)
setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
+ if (plat->uart_info->has_fifo)
+ setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
BIT(uart_enable_bit));
#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id stm32_serial_id[] = {
- { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32x7_info},
- { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32x7_info},
+ { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
+ { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
{}
};
u8 uart_enable_bit; /* UART_CR1_UE */
bool stm32f4; /* true for STM32F4, false otherwise */
bool has_overrun_disable;
+ bool has_fifo;
};
-struct stm32_uart_info stm32x7_info = {
+struct stm32_uart_info stm32f7_info = {
.uart_enable_bit = 0,
.stm32f4 = false,
.has_overrun_disable = true,
+ .has_fifo = false,
+};
+
+struct stm32_uart_info stm32h7_info = {
+ .uart_enable_bit = 0,
+ .stm32f4 = false,
+ .has_overrun_disable = true,
+ .has_fifo = true,
};
/* Information about a serial port */
unsigned long int clock_rate;
};
+#define USART_CR1_FIFOEN BIT(29)
#define USART_CR1_OVER8 BIT(15)
#define USART_CR1_TE BIT(3)
#define USART_CR1_RE BIT(2)