const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
const u16 *reg_temp_alternate, *reg_temp_crit;
int num_reg_temp;
+ bool have_vid = false;
+ u8 cr2a;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
/* Initialize the chip */
nct6775_init_device(data);
- data->vrm = vid_which_vrm();
err = superio_enter(sio_data->sioreg);
if (err)
return err;
+ cr2a = superio_inb(sio_data->sioreg, 0x2a);
+ switch (data->kind) {
+ case nct6775:
+ have_vid = (cr2a & 0x40);
+ break;
+ case nct6776:
+ have_vid = (cr2a & 0x60) == 0x40;
+ break;
+ case nct6779:
+ break;
+ }
+
/*
* Read VID value
* We can get the VID input values directly at logical device D 0xe3.
*/
- superio_select(sio_data->sioreg, NCT6775_LD_VID);
- data->vid = superio_inb(sio_data->sioreg, 0xe3);
+ if (have_vid) {
+ superio_select(sio_data->sioreg, NCT6775_LD_VID);
+ data->vid = superio_inb(sio_data->sioreg, 0xe3);
+ data->vrm = vid_which_vrm();
+ }
if (fan_debounce) {
u8 tmp;
superio_exit(sio_data->sioreg);
- err = device_create_file(dev, &dev_attr_cpu0_vid);
- if (err)
- return err;
+ if (have_vid) {
+ err = device_create_file(dev, &dev_attr_cpu0_vid);
+ if (err)
+ return err;
+ }
err = nct6775_check_fan_inputs(sio_data, data);
if (err)