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1 /*
2  * nct6775 - Driver for the hardware monitoring functionality of
3  *             Nuvoton NCT677x Super-I/O chips
4  *
5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
6  *
7  * Derived from w83627ehf driver
8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
9  * Copyright (C) 2006  Yuan Mu (Winbond),
10  *                     Rudolf Marek <r.marek@assembler.cz>
11  *                     David Hubbard <david.c.hubbard@gmail.com>
12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
14  *
15  * Shamelessly ripped from the w83627hf driver
16  * Copyright (C) 2003  Mark Studebaker
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License as published by
20  * the Free Software Foundation; either version 2 of the License, or
21  * (at your option) any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; if not, write to the Free Software
30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31  *
32  *
33  * Supports the following chips:
34  *
35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
36  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
37  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
38  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
39  *
40  * #temp lists the number of monitored temperature sources (first value) plus
41  * the number of directly connectable temperature sensors (second value).
42  */
43
44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/slab.h>
49 #include <linux/jiffies.h>
50 #include <linux/platform_device.h>
51 #include <linux/hwmon.h>
52 #include <linux/hwmon-sysfs.h>
53 #include <linux/hwmon-vid.h>
54 #include <linux/err.h>
55 #include <linux/mutex.h>
56 #include <linux/acpi.h>
57 #include <linux/io.h>
58 #include "lm75.h"
59 #include "compat.h"
60
61 #define USE_ALTERNATE
62
63 enum kinds { nct6775, nct6776, nct6779 };
64
65 /* used to set data->name = nct6775_device_names[data->sio_kind] */
66 static const char * const nct6775_device_names[] = {
67         "nct6775",
68         "nct6776",
69         "nct6779",
70 };
71
72 static unsigned short force_id;
73 module_param(force_id, ushort, 0);
74 MODULE_PARM_DESC(force_id, "Override the detected device ID");
75
76 static unsigned short fan_debounce;
77 module_param(fan_debounce, ushort, 0);
78 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
79
80 #define DRVNAME "nct6775"
81
82 /*
83  * Super-I/O constants and functions
84  */
85
86 #define NCT6775_LD_ACPI         0x0a
87 #define NCT6775_LD_HWM          0x0b
88 #define NCT6775_LD_VID          0x0d
89
90 #define SIO_REG_LDSEL           0x07    /* Logical device select */
91 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
92 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
93 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
94
95 #define SIO_NCT6775_ID          0xb470
96 #define SIO_NCT6776_ID          0xc330
97 #define SIO_NCT6779_ID          0xc560
98 #define SIO_ID_MASK             0xFFF0
99
100 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
101
102 static inline void
103 superio_outb(int ioreg, int reg, int val)
104 {
105         outb(reg, ioreg);
106         outb(val, ioreg + 1);
107 }
108
109 static inline int
110 superio_inb(int ioreg, int reg)
111 {
112         outb(reg, ioreg);
113         return inb(ioreg + 1);
114 }
115
116 static inline void
117 superio_select(int ioreg, int ld)
118 {
119         outb(SIO_REG_LDSEL, ioreg);
120         outb(ld, ioreg + 1);
121 }
122
123 static inline int
124 superio_enter(int ioreg)
125 {
126         /*
127          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
128          */
129         if (!request_muxed_region(ioreg, 2, DRVNAME))
130                 return -EBUSY;
131
132         outb(0x87, ioreg);
133         outb(0x87, ioreg);
134
135         return 0;
136 }
137
138 static inline void
139 superio_exit(int ioreg)
140 {
141         outb(0xaa, ioreg);
142         outb(0x02, ioreg);
143         outb(0x02, ioreg + 1);
144         release_region(ioreg, 2);
145 }
146
147 /*
148  * ISA constants
149  */
150
151 #define IOREGION_ALIGNMENT      (~7)
152 #define IOREGION_OFFSET         5
153 #define IOREGION_LENGTH         2
154 #define ADDR_REG_OFFSET         0
155 #define DATA_REG_OFFSET         1
156
157 #define NCT6775_REG_BANK        0x4E
158 #define NCT6775_REG_CONFIG      0x40
159
160 /*
161  * Not currently used:
162  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
163  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
164  * REG_MAN_ID is at port 0x4f
165  * REG_CHIP_ID is at port 0x58
166  */
167
168 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
169 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
170
171 #define NUM_REG_ALARM   4       /* Max number of alarm registers */
172
173 /* Common and NCT6775 specific data */
174
175 /* Voltage min/max registers for nr=7..14 are in bank 5 */
176
177 static const u16 NCT6775_REG_IN_MAX[] = {
178         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
179         0x55c, 0x55e, 0x560, 0x562 };
180 static const u16 NCT6775_REG_IN_MIN[] = {
181         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
182         0x55d, 0x55f, 0x561, 0x563 };
183 static const u16 NCT6775_REG_IN[] = {
184         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
185 };
186
187 #define NCT6775_REG_VBAT                0x5D
188 #define NCT6775_REG_DIODE               0x5E
189
190 #define NCT6775_REG_FANDIV1             0x506
191 #define NCT6775_REG_FANDIV2             0x507
192
193 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
194
195 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
196
197 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
198
199 static const s8 NCT6775_ALARM_BITS[] = {
200         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
201         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
202         -1,                             /* unused */
203         6, 7, 11, 10, 23,               /* fan1..fan5 */
204         -1, -1, -1,                     /* unused */
205         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
206         12, -1 };                       /* intrusion0, intrusion1 */
207
208 #define FAN_ALARM_BASE          16
209 #define TEMP_ALARM_BASE         24
210 #define INTRUSION_ALARM_BASE    30
211
212 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
213 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
214
215 /* DC or PWM output fan configuration */
216 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
217 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
218
219 /* Advanced Fan control, some values are common for all fans */
220
221 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
222 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
223 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
224         0x103, 0x203, 0x303, 0x803, 0x903 };
225 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
226         0x104, 0x204, 0x304, 0x804, 0x904 };
227 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
228         0x105, 0x205, 0x305, 0x805, 0x905 };
229 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
230         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
231 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
232 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
233
234 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
235         0x107, 0x207, 0x307, 0x807, 0x907 };
236 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
237 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
238
239 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
240 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
241 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
242
243 static const u16 NCT6775_REG_TEMP[] = {
244         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
245
246 static const u16 NCT6775_REG_TEMP_CONFIG[] = {
247         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
248 static const u16 NCT6775_REG_TEMP_HYST[] = {
249         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
250 static const u16 NCT6775_REG_TEMP_OVER[] = {
251         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
252
253 static const u16 NCT6775_REG_TEMP_SOURCE[] = {
254         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
255
256 static const u16 NCT6775_REG_TEMP_SEL[] = {
257         0x100, 0x200, 0x300, 0x800, 0x900 };
258
259 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
260         0x139, 0x239, 0x339, 0x839, 0x939 };
261 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
262         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
263 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
264         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
265 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
266         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
267 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
268         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
269
270 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
271
272 static const u16 NCT6775_REG_AUTO_TEMP[] = {
273         0x121, 0x221, 0x321, 0x821, 0x921 };
274 static const u16 NCT6775_REG_AUTO_PWM[] = {
275         0x127, 0x227, 0x327, 0x827, 0x927 };
276
277 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
278 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
279
280 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
281
282 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
283         0x135, 0x235, 0x335, 0x835, 0x935 };
284 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
285         0x138, 0x238, 0x338, 0x838, 0x938 };
286
287 static const char *const nct6775_temp_label[] = {
288         "",
289         "SYSTIN",
290         "CPUTIN",
291         "AUXTIN",
292         "AMD SB-TSI",
293         "PECI Agent 0",
294         "PECI Agent 1",
295         "PECI Agent 2",
296         "PECI Agent 3",
297         "PECI Agent 4",
298         "PECI Agent 5",
299         "PECI Agent 6",
300         "PECI Agent 7",
301         "PCH_CHIP_CPU_MAX_TEMP",
302         "PCH_CHIP_TEMP",
303         "PCH_CPU_TEMP",
304         "PCH_MCH_TEMP",
305         "PCH_DIM0_TEMP",
306         "PCH_DIM1_TEMP",
307         "PCH_DIM2_TEMP",
308         "PCH_DIM3_TEMP"
309 };
310
311 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
312         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
313
314 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
315         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
316             0xa07 };
317
318 /* NCT6776 specific data */
319
320 static const s8 NCT6776_ALARM_BITS[] = {
321         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
322         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
323         -1,                             /* unused */
324         6, 7, 11, 10, 23,               /* fan1..fan5 */
325         -1, -1, -1,                     /* unused */
326         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
327         12, 9 };                        /* intrusion0, intrusion1 */
328
329 static const u16 NCT6776_REG_TOLERANCE_H[] = {
330         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
331
332 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
333 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
334
335 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
336 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
337
338 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
339         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
340
341 static const u16 NCT6776_REG_TEMP_CONFIG[11] = {
342         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
343
344 static const char *const nct6776_temp_label[] = {
345         "",
346         "SYSTIN",
347         "CPUTIN",
348         "AUXTIN",
349         "SMBUSMASTER 0",
350         "SMBUSMASTER 1",
351         "SMBUSMASTER 2",
352         "SMBUSMASTER 3",
353         "SMBUSMASTER 4",
354         "SMBUSMASTER 5",
355         "SMBUSMASTER 6",
356         "SMBUSMASTER 7",
357         "PECI Agent 0",
358         "PECI Agent 1",
359         "PCH_CHIP_CPU_MAX_TEMP",
360         "PCH_CHIP_TEMP",
361         "PCH_CPU_TEMP",
362         "PCH_MCH_TEMP",
363         "PCH_DIM0_TEMP",
364         "PCH_DIM1_TEMP",
365         "PCH_DIM2_TEMP",
366         "PCH_DIM3_TEMP",
367         "BYTE_TEMP"
368 };
369
370 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
371         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
372
373 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
374         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
375
376 /* NCT6779 specific data */
377
378 static const u16 NCT6779_REG_IN[] = {
379         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
380         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
381
382 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
383         0x459, 0x45A, 0x45B, 0x568 };
384
385 static const s8 NCT6779_ALARM_BITS[] = {
386         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
387         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
388         -1,                             /* unused */
389         6, 7, 11, 10, 23,               /* fan1..fan5 */
390         -1, -1, -1,                     /* unused */
391         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
392         12, 9 };                        /* intrusion0, intrusion1 */
393
394 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
395 static const u16 NCT6779_REG_FAN_PULSES[] = {
396         0x644, 0x645, 0x646, 0x647, 0x648 };
397
398 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
399         0x136, 0x236, 0x336, 0x836, 0x936 };
400 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
401         0x137, 0x237, 0x337, 0x837, 0x937 };
402
403 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
404 static const u16 NCT6779_REG_TEMP_HYST[] = { 0x3a, 0x153, 0, 0, 0, 0 };
405 static const u16 NCT6779_REG_TEMP_OVER[] = { 0x39, 0x155, 0, 0, 0, 0 };
406 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
407         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
408
409 static const u16 NCT6779_REG_TEMP_CONFIG[11] = { 0x18, 0x152 };
410
411 static const char *const nct6779_temp_label[] = {
412         "",
413         "SYSTIN",
414         "CPUTIN",
415         "AUXTIN0",
416         "AUXTIN1",
417         "AUXTIN2",
418         "AUXTIN3",
419         "",
420         "SMBUSMASTER 0",
421         "SMBUSMASTER 1",
422         "SMBUSMASTER 2",
423         "SMBUSMASTER 3",
424         "SMBUSMASTER 4",
425         "SMBUSMASTER 5",
426         "SMBUSMASTER 6",
427         "SMBUSMASTER 7",
428         "PECI Agent 0",
429         "PECI Agent 1",
430         "PCH_CHIP_CPU_MAX_TEMP",
431         "PCH_CHIP_TEMP",
432         "PCH_CPU_TEMP",
433         "PCH_MCH_TEMP",
434         "PCH_DIM0_TEMP",
435         "PCH_DIM1_TEMP",
436         "PCH_DIM2_TEMP",
437         "PCH_DIM3_TEMP",
438         "BYTE_TEMP"
439 };
440
441 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
442         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
443             0, 0, 0, 0, 0, 0, 0, 0,
444             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
445             0x408, 0 };
446
447 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
448         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
449
450 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
451 {
452         if (mode == 0 && pwm == 255)
453                 return off;
454         return mode + 1;
455 }
456
457 static int pwm_enable_to_reg(enum pwm_enable mode)
458 {
459         if (mode == off)
460                 return 0;
461         return mode - 1;
462 }
463
464 /*
465  * Conversions
466  */
467
468 /* 1 is DC mode, output in ms */
469 static unsigned int step_time_from_reg(u8 reg, u8 mode)
470 {
471         return mode ? 400 * reg : 100 * reg;
472 }
473
474 static u8 step_time_to_reg(unsigned int msec, u8 mode)
475 {
476         return SENSORS_LIMIT((mode ? (msec + 200) / 400 :
477                                         (msec + 50) / 100), 1, 255);
478 }
479
480 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
481 {
482         if (reg == 0 || reg == 255)
483                 return 0;
484         return 1350000U / (reg << divreg);
485 }
486
487 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
488 {
489         if ((reg & 0xff1f) == 0xff1f)
490                 return 0;
491
492         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
493
494         if (reg == 0)
495                 return 0;
496
497         return 1350000U / reg;
498 }
499
500 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
501 {
502         if (reg == 0 || reg == 0xffff)
503                 return 0;
504
505         /*
506          * Even though the registers are 16 bit wide, the fan divisor
507          * still applies.
508          */
509         return 1350000U / (reg << divreg);
510 }
511
512 static u16 fan_to_reg(u32 fan, unsigned int divreg)
513 {
514         if (!fan)
515                 return 0;
516
517         return (1350000U / fan) >> divreg;
518 }
519
520 static inline unsigned int
521 div_from_reg(u8 reg)
522 {
523         return 1 << reg;
524 }
525
526 /*
527  * Some of the voltage inputs have internal scaling, the tables below
528  * contain 8 (the ADC LSB in mV) * scaling factor * 100
529  */
530 static const u16 scale_in[15] = {
531         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
532         800, 800
533 };
534
535 static inline long in_from_reg(u8 reg, u8 nr)
536 {
537         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
538 }
539
540 static inline u8 in_to_reg(u32 val, u8 nr)
541 {
542         return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
543                              255);
544 }
545
546 /*
547  * Data structures and manipulation thereof
548  */
549
550 struct nct6775_data {
551         int addr;       /* IO base of hw monitor block */
552         enum kinds kind;
553         const char *name;
554
555         struct device *hwmon_dev;
556         struct mutex lock;
557
558         u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
559                                     * 3=temp_crit
560                                     */
561         u8 temp_src[NUM_TEMP];
562         u16 reg_temp_config[NUM_TEMP];
563         const char * const *temp_label;
564         int temp_label_num;
565
566         u16 REG_CONFIG;
567         u16 REG_VBAT;
568         u16 REG_DIODE;
569
570         const s8 *ALARM_BITS;
571
572         const u16 *REG_VIN;
573         const u16 *REG_IN_MINMAX[2];
574
575         const u16 *REG_TARGET;
576         const u16 *REG_FAN;
577         const u16 *REG_FAN_MODE;
578         const u16 *REG_FAN_MIN;
579         const u16 *REG_FAN_PULSES;
580         const u16 *REG_FAN_TIME[3];
581
582         const u16 *REG_TOLERANCE_H;
583
584         const u8 *REG_PWM_MODE;
585         const u8 *PWM_MODE_MASK;
586
587         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
588                                  * [3]=pwm_max, [4]=pwm_step,
589                                  * [5]=weight_duty_step, [6]=weight_duty_base
590                                  */
591         const u16 *REG_PWM_READ;
592
593         const u16 *REG_AUTO_TEMP;
594         const u16 *REG_AUTO_PWM;
595
596         const u16 *REG_CRITICAL_TEMP;
597         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
598
599         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
600         const u16 *REG_TEMP_SEL;
601         const u16 *REG_WEIGHT_TEMP_SEL;
602         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
603
604         const u16 *REG_TEMP_OFFSET;
605
606         const u16 *REG_ALARM;
607
608         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
609         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
610
611         struct mutex update_lock;
612         bool valid;             /* true if following fields are valid */
613         unsigned long last_updated;     /* In jiffies */
614
615         /* Register values */
616         u8 bank;                /* current register bank */
617         u8 in_num;              /* number of in inputs we have */
618         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
619         unsigned int rpm[5];
620         u16 fan_min[5];
621         u8 fan_pulses[5];
622         u8 fan_div[5];
623         u8 has_pwm;
624         u8 has_fan;             /* some fan inputs can be disabled */
625         u8 has_fan_min;         /* some fans don't have min register */
626         bool has_fan_div;
627
628         u8 temp_fixed_num;      /* 3 or 6 */
629         u8 temp_type[NUM_TEMP_FIXED];
630         s8 temp_offset[NUM_TEMP_FIXED];
631         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
632                                 * 3=temp_crit */
633         u64 alarms;
634
635         u8 pwm_num;     /* number of pwm */
636         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
637         enum pwm_enable pwm_enable[5];
638                         /* 0->off
639                          * 1->manual
640                          * 2->thermal cruise mode (also called SmartFan I)
641                          * 3->fan speed cruise mode
642                          * 4->SmartFan III
643                          * 5->enhanced variable thermal cruise (SmartFan IV)
644                          */
645         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
646                          * [3]=pwm_max, [4]=pwm_step,
647                          * [5]=weight_duty_step, [6]=weight_duty_base
648                          */
649
650         u8 target_temp[5];
651         u8 target_temp_mask;
652         u32 target_speed[5];
653         u32 target_speed_tolerance[5];
654         u8 speed_tolerance_limit;
655
656         u8 temp_tolerance[2][5];
657         u8 tolerance_mask;
658
659         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
660
661         /* Automatic fan speed control registers */
662         int auto_pwm_num;
663         u8 auto_pwm[5][7];
664         u8 auto_temp[5][7];
665         u8 pwm_temp_sel[5];
666         u8 pwm_weight_temp_sel[5];
667         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
668                                  * 2->temp_base
669                                  */
670
671         u8 vid;
672         u8 vrm;
673
674         u16 have_temp;
675         u16 have_temp_fixed;
676         u16 have_in;
677 #ifdef CONFIG_PM
678         /* Remember extra register values over suspend/resume */
679         u8 vbat;
680         u8 fandiv1;
681         u8 fandiv2;
682 #endif
683 };
684
685 struct nct6775_sio_data {
686         int sioreg;
687         enum kinds kind;
688 };
689
690 static bool is_word_sized(struct nct6775_data *data, u16 reg)
691 {
692         switch (data->kind) {
693         case nct6775:
694                 return (((reg & 0xff00) == 0x100 ||
695                     (reg & 0xff00) == 0x200) &&
696                    ((reg & 0x00ff) == 0x50 ||
697                     (reg & 0x00ff) == 0x53 ||
698                     (reg & 0x00ff) == 0x55)) ||
699                   (reg & 0xfff0) == 0x630 ||
700                   reg == 0x640 || reg == 0x642 ||
701                   reg == 0x662 ||
702                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
703                   reg == 0x73 || reg == 0x75 || reg == 0x77;
704         case nct6776:
705                 return (((reg & 0xff00) == 0x100 ||
706                     (reg & 0xff00) == 0x200) &&
707                    ((reg & 0x00ff) == 0x50 ||
708                     (reg & 0x00ff) == 0x53 ||
709                     (reg & 0x00ff) == 0x55)) ||
710                   (reg & 0xfff0) == 0x630 ||
711                   reg == 0x402 ||
712                   reg == 0x640 || reg == 0x642 ||
713                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
714                   reg == 0x73 || reg == 0x75 || reg == 0x77;
715         case nct6779:
716                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
717                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
718                   reg == 0x402 ||
719                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
720                   reg == 0x640 || reg == 0x642 ||
721                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
722                   reg == 0x7b;
723         }
724         return false;
725 }
726
727 /*
728  * On older chips, only registers 0x50-0x5f are banked.
729  * On more recent chips, all registers are banked.
730  * Assume that is the case and set the bank number for each access.
731  * Cache the bank number so it only needs to be set if it changes.
732  */
733 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
734 {
735         u8 bank = reg >> 8;
736         if (data->bank != bank) {
737                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
738                 outb_p(bank, data->addr + DATA_REG_OFFSET);
739                 data->bank = bank;
740         }
741 }
742
743 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
744 {
745         int res, word_sized = is_word_sized(data, reg);
746
747         mutex_lock(&data->lock);
748
749         nct6775_set_bank(data, reg);
750         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
751         res = inb_p(data->addr + DATA_REG_OFFSET);
752         if (word_sized) {
753                 outb_p((reg & 0xff) + 1,
754                        data->addr + ADDR_REG_OFFSET);
755                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
756         }
757
758         mutex_unlock(&data->lock);
759         return res;
760 }
761
762 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
763 {
764         int word_sized = is_word_sized(data, reg);
765
766         mutex_lock(&data->lock);
767
768         nct6775_set_bank(data, reg);
769         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
770         if (word_sized) {
771                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
772                 outb_p((reg & 0xff) + 1,
773                        data->addr + ADDR_REG_OFFSET);
774         }
775         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
776
777         mutex_unlock(&data->lock);
778         return 0;
779 }
780
781 /* We left-align 8-bit temperature values to make the code simpler */
782 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
783 {
784         u16 res;
785
786         res = nct6775_read_value(data, reg);
787         if (!is_word_sized(data, reg))
788                 res <<= 8;
789
790         return res;
791 }
792
793 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
794 {
795         if (!is_word_sized(data, reg))
796                 value >>= 8;
797         return nct6775_write_value(data, reg, value);
798 }
799
800 /* This function assumes that the caller holds data->update_lock */
801 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
802 {
803         u8 reg;
804
805         switch (nr) {
806         case 0:
807                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
808                     | (data->fan_div[0] & 0x7);
809                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
810                 break;
811         case 1:
812                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
813                     | ((data->fan_div[1] << 4) & 0x70);
814                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
815                 break;
816         case 2:
817                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
818                     | (data->fan_div[2] & 0x7);
819                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
820                 break;
821         case 3:
822                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
823                     | ((data->fan_div[3] << 4) & 0x70);
824                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
825                 break;
826         }
827 }
828
829 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
830 {
831         if (data->kind == nct6775)
832                 nct6775_write_fan_div(data, nr);
833 }
834
835 static void nct6775_update_fan_div(struct nct6775_data *data)
836 {
837         u8 i;
838
839         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
840         data->fan_div[0] = i & 0x7;
841         data->fan_div[1] = (i & 0x70) >> 4;
842         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
843         data->fan_div[2] = i & 0x7;
844         if (data->has_fan & (1<<3))
845                 data->fan_div[3] = (i & 0x70) >> 4;
846 }
847
848 static void nct6775_update_fan_div_common(struct nct6775_data *data)
849 {
850         if (data->kind == nct6775)
851                 nct6775_update_fan_div(data);
852 }
853
854 static void nct6775_init_fan_div(struct nct6775_data *data)
855 {
856         int i;
857
858         nct6775_update_fan_div_common(data);
859         /*
860          * For all fans, start with highest divider value if the divider
861          * register is not initialized. This ensures that we get a
862          * reading from the fan count register, even if it is not optimal.
863          * We'll compute a better divider later on.
864          */
865         for (i = 0; i < 3; i++) {
866                 if (!(data->has_fan & (1 << i)))
867                         continue;
868                 if (data->fan_div[i] == 0) {
869                         data->fan_div[i] = 7;
870                         nct6775_write_fan_div_common(data, i);
871                 }
872         }
873 }
874
875 static void nct6775_init_fan_common(struct device *dev,
876                                     struct nct6775_data *data)
877 {
878         int i;
879         u8 reg;
880
881         if (data->has_fan_div)
882                 nct6775_init_fan_div(data);
883
884         /*
885          * If fan_min is not set (0), set it to 0xff to disable it. This
886          * prevents the unnecessary warning when fanX_min is reported as 0.
887          */
888         for (i = 0; i < 5; i++) {
889                 if (data->has_fan_min & (1 << i)) {
890                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
891                         if (!reg)
892                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
893                                                     data->has_fan_div ? 0xff
894                                                                       : 0xff1f);
895                 }
896         }
897 }
898
899 static void nct6775_select_fan_div(struct device *dev,
900                                    struct nct6775_data *data, int nr, u16 reg)
901 {
902         u8 fan_div = data->fan_div[nr];
903         u16 fan_min;
904
905         if (!data->has_fan_div)
906                 return;
907
908         /*
909          * If we failed to measure the fan speed, or the reported value is not
910          * in the optimal range, and the clock divider can be modified,
911          * let's try that for next time.
912          */
913         if (reg == 0x00 && fan_div < 0x07)
914                 fan_div++;
915         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
916                 fan_div--;
917
918         if (fan_div != data->fan_div[nr]) {
919                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
920                         nr + 1, div_from_reg(data->fan_div[nr]),
921                         div_from_reg(fan_div));
922
923                 /* Preserve min limit if possible */
924                 if (data->has_fan_min & (1 << nr)) {
925                         fan_min = data->fan_min[nr];
926                         if (fan_div > data->fan_div[nr]) {
927                                 if (fan_min != 255 && fan_min > 1)
928                                         fan_min >>= 1;
929                         } else {
930                                 if (fan_min != 255) {
931                                         fan_min <<= 1;
932                                         if (fan_min > 254)
933                                                 fan_min = 254;
934                                 }
935                         }
936                         if (fan_min != data->fan_min[nr]) {
937                                 data->fan_min[nr] = fan_min;
938                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
939                                                     fan_min);
940                         }
941                 }
942                 data->fan_div[nr] = fan_div;
943                 nct6775_write_fan_div_common(data, nr);
944         }
945 }
946
947 static void nct6775_update_pwm(struct device *dev)
948 {
949         struct nct6775_data *data = dev_get_drvdata(dev);
950         int i, j;
951         int fanmodecfg, reg;
952         bool duty_is_dc;
953
954         for (i = 0; i < data->pwm_num; i++) {
955                 if (!(data->has_pwm & (1 << i)))
956                         continue;
957
958                 duty_is_dc = data->REG_PWM_MODE[i] &&
959                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
960                    & data->PWM_MODE_MASK[i]);
961                 data->pwm_mode[i] = duty_is_dc;
962
963                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
964                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
965                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
966                                 data->pwm[j][i]
967                                   = nct6775_read_value(data,
968                                                        data->REG_PWM[j][i]);
969                         }
970                 }
971
972                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
973                                                         (fanmodecfg >> 4) & 7);
974
975                 if (!data->temp_tolerance[0][i] ||
976                     data->pwm_enable[i] != speed_cruise)
977                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
978                 if (!data->target_speed_tolerance[i] ||
979                     data->pwm_enable[i] == speed_cruise) {
980                         u8 t = fanmodecfg & 0x0f;
981                         if (data->REG_TOLERANCE_H) {
982                                 t |= (nct6775_read_value(data,
983                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
984                         }
985                         data->target_speed_tolerance[i] = t;
986                 }
987
988                 data->temp_tolerance[1][i] =
989                         nct6775_read_value(data,
990                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
991
992                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
993                 data->pwm_temp_sel[i] = reg & 0x1f;
994                 /* If fan can stop, report floor as 0 */
995                 if (reg & 0x80)
996                         data->pwm[2][i] = 0;
997
998                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
999                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1000                 /* If weight is disabled, report weight source as 0 */
1001                 if (j == 1 && !(reg & 0x80))
1002                         data->pwm_weight_temp_sel[i] = 0;
1003
1004                 /* Weight temp data */
1005                 for (j = 0; j < 3; j++) {
1006                         data->weight_temp[j][i]
1007                           = nct6775_read_value(data,
1008                                                data->REG_WEIGHT_TEMP[j][i]);
1009                 }
1010         }
1011 }
1012
1013 static void nct6775_update_pwm_limits(struct device *dev)
1014 {
1015         struct nct6775_data *data = dev_get_drvdata(dev);
1016         int i, j;
1017         u8 reg;
1018         u16 reg_t;
1019
1020         for (i = 0; i < data->pwm_num; i++) {
1021                 if (!(data->has_pwm & (1 << i)))
1022                         continue;
1023
1024                 for (j = 0; j < 3; j++) {
1025                         data->fan_time[j][i] =
1026                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1027                 }
1028
1029                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1030                 /* Update only in matching mode or if never updated */
1031                 if (!data->target_temp[i] ||
1032                     data->pwm_enable[i] == thermal_cruise)
1033                         data->target_temp[i] = reg_t & data->target_temp_mask;
1034                 if (!data->target_speed[i] ||
1035                     data->pwm_enable[i] == speed_cruise) {
1036                         if (data->REG_TOLERANCE_H) {
1037                                 reg_t |= (nct6775_read_value(data,
1038                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1039                         }
1040                         data->target_speed[i] = reg_t;
1041                 }
1042
1043                 for (j = 0; j < data->auto_pwm_num; j++) {
1044                         data->auto_pwm[i][j] =
1045                           nct6775_read_value(data,
1046                                              NCT6775_AUTO_PWM(data, i, j));
1047                         data->auto_temp[i][j] =
1048                           nct6775_read_value(data,
1049                                              NCT6775_AUTO_TEMP(data, i, j));
1050                 }
1051
1052                 /* critical auto_pwm temperature data */
1053                 data->auto_temp[i][data->auto_pwm_num] =
1054                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1055
1056                 switch (data->kind) {
1057                 case nct6775:
1058                         reg = nct6775_read_value(data,
1059                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1060                         data->auto_pwm[i][data->auto_pwm_num] =
1061                                                 (reg & 0x02) ? 0xff : 0x00;
1062                         break;
1063                 case nct6776:
1064                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1065                         break;
1066                 case nct6779:
1067                         reg = nct6775_read_value(data,
1068                                         NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
1069                         if (reg & 1)
1070                                 data->auto_pwm[i][data->auto_pwm_num] =
1071                                   nct6775_read_value(data,
1072                                         NCT6779_REG_CRITICAL_PWM[i]);
1073                         else
1074                                 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1075                         break;
1076                 }
1077         }
1078 }
1079
1080 static struct nct6775_data *nct6775_update_device(struct device *dev)
1081 {
1082         struct nct6775_data *data = dev_get_drvdata(dev);
1083         int i, j;
1084
1085         mutex_lock(&data->update_lock);
1086
1087         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1088             || !data->valid) {
1089                 /* Fan clock dividers */
1090                 nct6775_update_fan_div_common(data);
1091
1092                 /* Measured voltages and limits */
1093                 for (i = 0; i < data->in_num; i++) {
1094                         if (!(data->have_in & (1 << i)))
1095                                 continue;
1096
1097                         data->in[i][0] = nct6775_read_value(data,
1098                                                             data->REG_VIN[i]);
1099                         data->in[i][1] = nct6775_read_value(data,
1100                                           data->REG_IN_MINMAX[0][i]);
1101                         data->in[i][2] = nct6775_read_value(data,
1102                                           data->REG_IN_MINMAX[1][i]);
1103                 }
1104
1105                 /* Measured fan speeds and limits */
1106                 for (i = 0; i < 5; i++) {
1107                         u16 reg;
1108
1109                         if (!(data->has_fan & (1 << i)))
1110                                 continue;
1111
1112                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1113                         data->rpm[i] = data->fan_from_reg(reg,
1114                                                           data->fan_div[i]);
1115
1116                         if (data->has_fan_min & (1 << i))
1117                                 data->fan_min[i] = nct6775_read_value(data,
1118                                            data->REG_FAN_MIN[i]);
1119                         data->fan_pulses[i] =
1120                           nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1121
1122                         nct6775_select_fan_div(dev, data, i, reg);
1123                 }
1124
1125                 nct6775_update_pwm(dev);
1126                 nct6775_update_pwm_limits(dev);
1127
1128                 /* Measured temperatures and limits */
1129                 for (i = 0; i < NUM_TEMP; i++) {
1130                         if (!(data->have_temp & (1 << i)))
1131                                 continue;
1132                         for (j = 0; j < 4; j++) {
1133                                 if (data->reg_temp[j][i])
1134                                         data->temp[j][i]
1135                                           = nct6775_read_temp(data,
1136                                                 data->reg_temp[j][i]);
1137                         }
1138                         if (!(data->have_temp_fixed & (1 << i)))
1139                                 continue;
1140                         data->temp_offset[i]
1141                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1142                 }
1143
1144                 data->alarms = 0;
1145                 for (i = 0; i < NUM_REG_ALARM; i++) {
1146                         u8 alarm;
1147                         if (!data->REG_ALARM[i])
1148                                 continue;
1149                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1150                         data->alarms |= ((u64)alarm) << (i << 3);
1151                 }
1152
1153                 data->last_updated = jiffies;
1154                 data->valid = true;
1155         }
1156
1157         mutex_unlock(&data->update_lock);
1158         return data;
1159 }
1160
1161 /*
1162  * Sysfs callback functions
1163  */
1164 static ssize_t
1165 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1166 {
1167         struct nct6775_data *data = nct6775_update_device(dev);
1168         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1169         int nr = sattr->nr;
1170         int index = sattr->index;
1171         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1172 }
1173
1174 static ssize_t
1175 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1176              size_t count)
1177 {
1178         struct nct6775_data *data = dev_get_drvdata(dev);
1179         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1180         int nr = sattr->nr;
1181         int index = sattr->index;
1182         unsigned long val;
1183         int err = kstrtoul(buf, 10, &val);
1184         if (err < 0)
1185                 return err;
1186         mutex_lock(&data->update_lock);
1187         data->in[nr][index] = in_to_reg(val, nr);
1188         nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1189                             data->in[nr][index]);
1190         mutex_unlock(&data->update_lock);
1191         return count;
1192 }
1193
1194 static ssize_t
1195 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1196 {
1197         struct nct6775_data *data = nct6775_update_device(dev);
1198         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1199         int nr = data->ALARM_BITS[sattr->index];
1200         return sprintf(buf, "%u\n",
1201                        (unsigned int)((data->alarms >> nr) & 0x01));
1202 }
1203
1204 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1205 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1206 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1207 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1208 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1209 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1210 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1211 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1212 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1213 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1214 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1215 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1216 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1217 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1218 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1219
1220 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1221 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1222 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1223 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1224 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1225 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1226 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1227 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1228 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1229 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1230 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1231 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1232 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1233 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1234 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1235
1236 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1237                             store_in_reg, 0, 1);
1238 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1239                             store_in_reg, 1, 1);
1240 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1241                             store_in_reg, 2, 1);
1242 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1243                             store_in_reg, 3, 1);
1244 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1245                             store_in_reg, 4, 1);
1246 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1247                             store_in_reg, 5, 1);
1248 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1249                             store_in_reg, 6, 1);
1250 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1251                             store_in_reg, 7, 1);
1252 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1253                             store_in_reg, 8, 1);
1254 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1255                             store_in_reg, 9, 1);
1256 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1257                             store_in_reg, 10, 1);
1258 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1259                             store_in_reg, 11, 1);
1260 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1261                             store_in_reg, 12, 1);
1262 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1263                             store_in_reg, 13, 1);
1264 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1265                             store_in_reg, 14, 1);
1266
1267 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1268                             store_in_reg, 0, 2);
1269 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1270                             store_in_reg, 1, 2);
1271 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1272                             store_in_reg, 2, 2);
1273 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1274                             store_in_reg, 3, 2);
1275 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1276                             store_in_reg, 4, 2);
1277 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1278                             store_in_reg, 5, 2);
1279 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1280                             store_in_reg, 6, 2);
1281 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1282                             store_in_reg, 7, 2);
1283 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1284                             store_in_reg, 8, 2);
1285 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1286                             store_in_reg, 9, 2);
1287 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1288                             store_in_reg, 10, 2);
1289 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1290                             store_in_reg, 11, 2);
1291 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1292                             store_in_reg, 12, 2);
1293 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1294                             store_in_reg, 13, 2);
1295 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1296                             store_in_reg, 14, 2);
1297
1298 static struct attribute *nct6775_attributes_in[15][5] = {
1299         {
1300                 &sensor_dev_attr_in0_input.dev_attr.attr,
1301                 &sensor_dev_attr_in0_min.dev_attr.attr,
1302                 &sensor_dev_attr_in0_max.dev_attr.attr,
1303                 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1304                 NULL
1305         },
1306         {
1307                 &sensor_dev_attr_in1_input.dev_attr.attr,
1308                 &sensor_dev_attr_in1_min.dev_attr.attr,
1309                 &sensor_dev_attr_in1_max.dev_attr.attr,
1310                 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1311                 NULL
1312         },
1313         {
1314                 &sensor_dev_attr_in2_input.dev_attr.attr,
1315                 &sensor_dev_attr_in2_min.dev_attr.attr,
1316                 &sensor_dev_attr_in2_max.dev_attr.attr,
1317                 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1318                 NULL
1319         },
1320         {
1321                 &sensor_dev_attr_in3_input.dev_attr.attr,
1322                 &sensor_dev_attr_in3_min.dev_attr.attr,
1323                 &sensor_dev_attr_in3_max.dev_attr.attr,
1324                 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1325                 NULL
1326         },
1327         {
1328                 &sensor_dev_attr_in4_input.dev_attr.attr,
1329                 &sensor_dev_attr_in4_min.dev_attr.attr,
1330                 &sensor_dev_attr_in4_max.dev_attr.attr,
1331                 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1332                 NULL
1333         },
1334         {
1335                 &sensor_dev_attr_in5_input.dev_attr.attr,
1336                 &sensor_dev_attr_in5_min.dev_attr.attr,
1337                 &sensor_dev_attr_in5_max.dev_attr.attr,
1338                 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1339                 NULL
1340         },
1341         {
1342                 &sensor_dev_attr_in6_input.dev_attr.attr,
1343                 &sensor_dev_attr_in6_min.dev_attr.attr,
1344                 &sensor_dev_attr_in6_max.dev_attr.attr,
1345                 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1346                 NULL
1347         },
1348         {
1349                 &sensor_dev_attr_in7_input.dev_attr.attr,
1350                 &sensor_dev_attr_in7_min.dev_attr.attr,
1351                 &sensor_dev_attr_in7_max.dev_attr.attr,
1352                 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1353                 NULL
1354         },
1355         {
1356                 &sensor_dev_attr_in8_input.dev_attr.attr,
1357                 &sensor_dev_attr_in8_min.dev_attr.attr,
1358                 &sensor_dev_attr_in8_max.dev_attr.attr,
1359                 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1360                 NULL
1361         },
1362         {
1363                 &sensor_dev_attr_in9_input.dev_attr.attr,
1364                 &sensor_dev_attr_in9_min.dev_attr.attr,
1365                 &sensor_dev_attr_in9_max.dev_attr.attr,
1366                 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1367                 NULL
1368         },
1369         {
1370                 &sensor_dev_attr_in10_input.dev_attr.attr,
1371                 &sensor_dev_attr_in10_min.dev_attr.attr,
1372                 &sensor_dev_attr_in10_max.dev_attr.attr,
1373                 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1374                 NULL
1375         },
1376         {
1377                 &sensor_dev_attr_in11_input.dev_attr.attr,
1378                 &sensor_dev_attr_in11_min.dev_attr.attr,
1379                 &sensor_dev_attr_in11_max.dev_attr.attr,
1380                 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1381                 NULL
1382         },
1383         {
1384                 &sensor_dev_attr_in12_input.dev_attr.attr,
1385                 &sensor_dev_attr_in12_min.dev_attr.attr,
1386                 &sensor_dev_attr_in12_max.dev_attr.attr,
1387                 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1388                 NULL
1389         },
1390         {
1391                 &sensor_dev_attr_in13_input.dev_attr.attr,
1392                 &sensor_dev_attr_in13_min.dev_attr.attr,
1393                 &sensor_dev_attr_in13_max.dev_attr.attr,
1394                 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1395                 NULL
1396         },
1397         {
1398                 &sensor_dev_attr_in14_input.dev_attr.attr,
1399                 &sensor_dev_attr_in14_min.dev_attr.attr,
1400                 &sensor_dev_attr_in14_max.dev_attr.attr,
1401                 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1402                 NULL
1403         },
1404 };
1405
1406 static const struct attribute_group nct6775_group_in[15] = {
1407         { .attrs = nct6775_attributes_in[0] },
1408         { .attrs = nct6775_attributes_in[1] },
1409         { .attrs = nct6775_attributes_in[2] },
1410         { .attrs = nct6775_attributes_in[3] },
1411         { .attrs = nct6775_attributes_in[4] },
1412         { .attrs = nct6775_attributes_in[5] },
1413         { .attrs = nct6775_attributes_in[6] },
1414         { .attrs = nct6775_attributes_in[7] },
1415         { .attrs = nct6775_attributes_in[8] },
1416         { .attrs = nct6775_attributes_in[9] },
1417         { .attrs = nct6775_attributes_in[10] },
1418         { .attrs = nct6775_attributes_in[11] },
1419         { .attrs = nct6775_attributes_in[12] },
1420         { .attrs = nct6775_attributes_in[13] },
1421         { .attrs = nct6775_attributes_in[14] },
1422 };
1423
1424 static ssize_t
1425 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1426 {
1427         struct nct6775_data *data = nct6775_update_device(dev);
1428         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1429         int nr = sattr->index;
1430         return sprintf(buf, "%d\n", data->rpm[nr]);
1431 }
1432
1433 static ssize_t
1434 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1435 {
1436         struct nct6775_data *data = nct6775_update_device(dev);
1437         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1438         int nr = sattr->index;
1439         return sprintf(buf, "%d\n",
1440                        data->fan_from_reg_min(data->fan_min[nr],
1441                                               data->fan_div[nr]));
1442 }
1443
1444 static ssize_t
1445 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1446 {
1447         struct nct6775_data *data = nct6775_update_device(dev);
1448         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1449         int nr = sattr->index;
1450         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1451 }
1452
1453 static ssize_t
1454 store_fan_min(struct device *dev, struct device_attribute *attr,
1455               const char *buf, size_t count)
1456 {
1457         struct nct6775_data *data = dev_get_drvdata(dev);
1458         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1459         int nr = sattr->index;
1460         unsigned long val;
1461         int err;
1462         unsigned int reg;
1463         u8 new_div;
1464
1465         err = kstrtoul(buf, 10, &val);
1466         if (err < 0)
1467                 return err;
1468
1469         mutex_lock(&data->update_lock);
1470         if (!data->has_fan_div) {
1471                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1472                 if (!val) {
1473                         val = 0xff1f;
1474                 } else {
1475                         if (val > 1350000U)
1476                                 val = 135000U;
1477                         val = 1350000U / val;
1478                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1479                 }
1480                 data->fan_min[nr] = val;
1481                 goto write_min; /* Leave fan divider alone */
1482         }
1483         if (!val) {
1484                 /* No min limit, alarm disabled */
1485                 data->fan_min[nr] = 255;
1486                 new_div = data->fan_div[nr]; /* No change */
1487                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1488                 goto write_div;
1489         }
1490         reg = 1350000U / val;
1491         if (reg >= 128 * 255) {
1492                 /*
1493                  * Speed below this value cannot possibly be represented,
1494                  * even with the highest divider (128)
1495                  */
1496                 data->fan_min[nr] = 254;
1497                 new_div = 7; /* 128 == (1 << 7) */
1498                 dev_warn(dev,
1499                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1500                          nr + 1, val, data->fan_from_reg_min(254, 7));
1501         } else if (!reg) {
1502                 /*
1503                  * Speed above this value cannot possibly be represented,
1504                  * even with the lowest divider (1)
1505                  */
1506                 data->fan_min[nr] = 1;
1507                 new_div = 0; /* 1 == (1 << 0) */
1508                 dev_warn(dev,
1509                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1510                          nr + 1, val, data->fan_from_reg_min(1, 0));
1511         } else {
1512                 /*
1513                  * Automatically pick the best divider, i.e. the one such
1514                  * that the min limit will correspond to a register value
1515                  * in the 96..192 range
1516                  */
1517                 new_div = 0;
1518                 while (reg > 192 && new_div < 7) {
1519                         reg >>= 1;
1520                         new_div++;
1521                 }
1522                 data->fan_min[nr] = reg;
1523         }
1524
1525 write_div:
1526         /*
1527          * Write both the fan clock divider (if it changed) and the new
1528          * fan min (unconditionally)
1529          */
1530         if (new_div != data->fan_div[nr]) {
1531                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1532                         nr + 1, div_from_reg(data->fan_div[nr]),
1533                         div_from_reg(new_div));
1534                 data->fan_div[nr] = new_div;
1535                 nct6775_write_fan_div_common(data, nr);
1536                 /* Give the chip time to sample a new speed value */
1537                 data->last_updated = jiffies;
1538         }
1539
1540 write_min:
1541         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1542         mutex_unlock(&data->update_lock);
1543
1544         return count;
1545 }
1546
1547 static ssize_t
1548 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1549 {
1550         struct nct6775_data *data = nct6775_update_device(dev);
1551         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1552         int p = data->fan_pulses[sattr->index];
1553
1554         return sprintf(buf, "%d\n", p ? : 4);
1555 }
1556
1557 static ssize_t
1558 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1559                  const char *buf, size_t count)
1560 {
1561         struct nct6775_data *data = dev_get_drvdata(dev);
1562         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1563         int nr = sattr->index;
1564         unsigned long val;
1565         int err;
1566
1567         err = kstrtoul(buf, 10, &val);
1568         if (err < 0)
1569                 return err;
1570
1571         if (val > 4)
1572                 return -EINVAL;
1573
1574         mutex_lock(&data->update_lock);
1575         data->fan_pulses[nr] = val & 3;
1576         nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1577         mutex_unlock(&data->update_lock);
1578
1579         return count;
1580 }
1581
1582 static struct sensor_device_attribute sda_fan_input[] = {
1583         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1584         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1585         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1586         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1587         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1588 };
1589
1590 static struct sensor_device_attribute sda_fan_alarm[] = {
1591         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1592         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1593         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1594         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1595         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1596 };
1597
1598 static struct sensor_device_attribute sda_fan_min[] = {
1599         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1600                     store_fan_min, 0),
1601         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1602                     store_fan_min, 1),
1603         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1604                     store_fan_min, 2),
1605         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1606                     store_fan_min, 3),
1607         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1608                     store_fan_min, 4),
1609 };
1610
1611 static struct sensor_device_attribute sda_fan_pulses[] = {
1612         SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1613                     store_fan_pulses, 0),
1614         SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1615                     store_fan_pulses, 1),
1616         SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1617                     store_fan_pulses, 2),
1618         SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1619                     store_fan_pulses, 3),
1620         SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1621                     store_fan_pulses, 4),
1622 };
1623
1624 static struct sensor_device_attribute sda_fan_div[] = {
1625         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1626         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1627         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1628         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1629         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1630 };
1631
1632 static ssize_t
1633 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1634 {
1635         struct nct6775_data *data = nct6775_update_device(dev);
1636         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1637         int nr = sattr->index;
1638         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1639 }
1640
1641 static ssize_t
1642 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1643 {
1644         struct nct6775_data *data = nct6775_update_device(dev);
1645         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1646         int nr = sattr->nr;
1647         int index = sattr->index;
1648
1649         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1650 }
1651
1652 static ssize_t
1653 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1654            size_t count)
1655 {
1656         struct nct6775_data *data = dev_get_drvdata(dev);
1657         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1658         int nr = sattr->nr;
1659         int index = sattr->index;
1660         int err;
1661         long val;
1662
1663         err = kstrtol(buf, 10, &val);
1664         if (err < 0)
1665                 return err;
1666
1667         mutex_lock(&data->update_lock);
1668         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1669         nct6775_write_temp(data, data->reg_temp[index][nr],
1670                            data->temp[index][nr]);
1671         mutex_unlock(&data->update_lock);
1672         return count;
1673 }
1674
1675 static ssize_t
1676 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1677 {
1678         struct nct6775_data *data = nct6775_update_device(dev);
1679         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1680
1681         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1682 }
1683
1684 static ssize_t
1685 store_temp_offset(struct device *dev, struct device_attribute *attr,
1686                   const char *buf, size_t count)
1687 {
1688         struct nct6775_data *data = dev_get_drvdata(dev);
1689         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1690         int nr = sattr->index;
1691         long val;
1692         int err;
1693
1694         err = kstrtol(buf, 10, &val);
1695         if (err < 0)
1696                 return err;
1697
1698         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1699
1700         mutex_lock(&data->update_lock);
1701         data->temp_offset[nr] = val;
1702         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1703         mutex_unlock(&data->update_lock);
1704
1705         return count;
1706 }
1707
1708 static ssize_t
1709 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1710 {
1711         struct nct6775_data *data = nct6775_update_device(dev);
1712         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1713         int nr = sattr->index;
1714         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1715 }
1716
1717 static ssize_t
1718 store_temp_type(struct device *dev, struct device_attribute *attr,
1719                 const char *buf, size_t count)
1720 {
1721         struct nct6775_data *data = nct6775_update_device(dev);
1722         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1723         int nr = sattr->index;
1724         unsigned long val;
1725         int err;
1726         u8 vbat, diode, bit;
1727
1728         err = kstrtoul(buf, 10, &val);
1729         if (err < 0)
1730                 return err;
1731
1732         if (val != 1 && val != 3 && val != 4)
1733                 return -EINVAL;
1734
1735         mutex_lock(&data->update_lock);
1736
1737         data->temp_type[nr] = val;
1738         vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1739         diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1740         bit = 0x02 << nr;
1741         switch (val) {
1742         case 1: /* CPU diode (diode, current mode) */
1743                 vbat |= bit;
1744                 diode |= bit;
1745                 break;
1746         case 3: /* diode, voltage mode */
1747                 vbat |= bit;
1748                 break;
1749         case 4: /* thermistor */
1750                 break;
1751         };
1752         nct6775_write_value(data, data->REG_VBAT, vbat);
1753         nct6775_write_value(data, data->REG_DIODE, diode);
1754
1755         mutex_unlock(&data->update_lock);
1756         return count;
1757 }
1758
1759 static struct sensor_device_attribute_2 sda_temp_input[] = {
1760         SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1761         SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1762         SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1763         SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1764         SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1765         SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1766         SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1767         SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1768         SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1769         SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1770 };
1771
1772 static struct sensor_device_attribute sda_temp_label[] = {
1773         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1774         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1775         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1776         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1777         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1778         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1779         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1780         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1781         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1782         SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1783 };
1784
1785 static struct sensor_device_attribute_2 sda_temp_max[] = {
1786         SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1787                       0, 1),
1788         SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1789                       1, 1),
1790         SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1791                       2, 1),
1792         SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1793                       3, 1),
1794         SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1795                       4, 1),
1796         SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1797                       5, 1),
1798         SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1799                       6, 1),
1800         SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1801                       7, 1),
1802         SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1803                       8, 1),
1804         SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1805                       9, 1),
1806 };
1807
1808 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1809         SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1810                       0, 2),
1811         SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1812                       1, 2),
1813         SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1814                       2, 2),
1815         SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1816                       3, 2),
1817         SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1818                       4, 2),
1819         SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1820                       5, 2),
1821         SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1822                       6, 2),
1823         SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1824                       7, 2),
1825         SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1826                       8, 2),
1827         SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1828                       9, 2),
1829 };
1830
1831 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1832         SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1833                       0, 3),
1834         SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1835                       1, 3),
1836         SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1837                       2, 3),
1838         SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1839                       3, 3),
1840         SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1841                       4, 3),
1842         SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1843                       5, 3),
1844         SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1845                       6, 3),
1846         SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1847                       7, 3),
1848         SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1849                       8, 3),
1850         SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1851                       9, 3),
1852 };
1853
1854 static struct sensor_device_attribute sda_temp_offset[] = {
1855         SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1856                     store_temp_offset, 0),
1857         SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1858                     store_temp_offset, 1),
1859         SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1860                     store_temp_offset, 2),
1861         SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1862                     store_temp_offset, 3),
1863         SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1864                     store_temp_offset, 4),
1865         SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1866                     store_temp_offset, 5),
1867 };
1868
1869 static struct sensor_device_attribute sda_temp_type[] = {
1870         SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1871                     store_temp_type, 0),
1872         SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1873                     store_temp_type, 1),
1874         SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1875                     store_temp_type, 2),
1876         SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1877                     store_temp_type, 3),
1878         SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1879                     store_temp_type, 4),
1880         SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1881                     store_temp_type, 5),
1882 };
1883
1884 static struct sensor_device_attribute sda_temp_alarm[] = {
1885         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1886                     TEMP_ALARM_BASE),
1887         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1888                     TEMP_ALARM_BASE + 1),
1889         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1890                     TEMP_ALARM_BASE + 2),
1891         SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1892                     TEMP_ALARM_BASE + 3),
1893         SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1894                     TEMP_ALARM_BASE + 4),
1895         SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1896                     TEMP_ALARM_BASE + 5),
1897 };
1898
1899 #define NUM_TEMP_ALARM  ARRAY_SIZE(sda_temp_alarm)
1900
1901 static ssize_t
1902 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1903 {
1904         struct nct6775_data *data = nct6775_update_device(dev);
1905         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1906
1907         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1908 }
1909
1910 static ssize_t
1911 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1912                const char *buf, size_t count)
1913 {
1914         struct nct6775_data *data = dev_get_drvdata(dev);
1915         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1916         int nr = sattr->index;
1917         unsigned long val;
1918         int err;
1919         u8 reg;
1920
1921         err = kstrtoul(buf, 10, &val);
1922         if (err < 0)
1923                 return err;
1924
1925         if (val > 1)
1926                 return -EINVAL;
1927
1928         /* Setting DC mode is not supported for all chips/channels */
1929         if (data->REG_PWM_MODE[nr] == 0) {
1930                 if (val)
1931                         return -EINVAL;
1932                 return count;
1933         }
1934
1935         mutex_lock(&data->update_lock);
1936         data->pwm_mode[nr] = val;
1937         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1938         reg &= ~data->PWM_MODE_MASK[nr];
1939         if (val)
1940                 reg |= data->PWM_MODE_MASK[nr];
1941         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1942         mutex_unlock(&data->update_lock);
1943         return count;
1944 }
1945
1946 static ssize_t
1947 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1948 {
1949         struct nct6775_data *data = nct6775_update_device(dev);
1950         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1951         int nr = sattr->nr;
1952         int index = sattr->index;
1953         int pwm;
1954
1955         /*
1956          * For automatic fan control modes, show current pwm readings.
1957          * Otherwise, show the configured value.
1958          */
1959         if (index == 0 && data->pwm_enable[nr] > manual)
1960                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1961         else
1962                 pwm = data->pwm[index][nr];
1963
1964         return sprintf(buf, "%d\n", pwm);
1965 }
1966
1967 static ssize_t
1968 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1969           size_t count)
1970 {
1971         struct nct6775_data *data = dev_get_drvdata(dev);
1972         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1973         int nr = sattr->nr;
1974         int index = sattr->index;
1975         unsigned long val;
1976         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1977         int maxval[7]
1978           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1979         int err;
1980         u8 reg;
1981
1982         err = kstrtoul(buf, 10, &val);
1983         if (err < 0)
1984                 return err;
1985         val = SENSORS_LIMIT(val, minval[index], maxval[index]);
1986
1987         mutex_lock(&data->update_lock);
1988         data->pwm[index][nr] = val;
1989         nct6775_write_value(data, data->REG_PWM[index][nr], val);
1990         if (index == 2) { /* floor: disable if val == 0 */
1991                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1992                 reg &= 0x7f;
1993                 if (val)
1994                         reg |= 0x80;
1995                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1996         }
1997         mutex_unlock(&data->update_lock);
1998         return count;
1999 }
2000
2001 /* Returns 0 if OK, -EINVAL otherwise */
2002 static int check_trip_points(struct nct6775_data *data, int nr)
2003 {
2004         int i;
2005
2006         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2007                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2008                         return -EINVAL;
2009         }
2010         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2011                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2012                         return -EINVAL;
2013         }
2014         /* validate critical temperature and pwm if enabled (pwm > 0) */
2015         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2016                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2017                                 data->auto_temp[nr][data->auto_pwm_num] ||
2018                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2019                                 data->auto_pwm[nr][data->auto_pwm_num])
2020                         return -EINVAL;
2021         }
2022         return 0;
2023 }
2024
2025 static void pwm_update_registers(struct nct6775_data *data, int nr)
2026 {
2027         u8 reg;
2028
2029         switch (data->pwm_enable[nr]) {
2030         case off:
2031         case manual:
2032                 break;
2033         case speed_cruise:
2034                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2035                 reg = (reg & ~data->tolerance_mask) |
2036                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2037                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2038                 nct6775_write_value(data, data->REG_TARGET[nr],
2039                                     data->target_speed[nr] & 0xff);
2040                 if (data->REG_TOLERANCE_H) {
2041                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2042                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2043                         nct6775_write_value(data,
2044                                             data->REG_TOLERANCE_H[nr],
2045                                             reg);
2046                 }
2047                 break;
2048         case thermal_cruise:
2049                 nct6775_write_value(data, data->REG_TARGET[nr],
2050                                     data->target_temp[nr]);
2051                 /* intentional */
2052         default:
2053                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2054                 reg = (reg & ~data->tolerance_mask) |
2055                   data->temp_tolerance[0][nr];
2056                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2057                 break;
2058         }
2059 }
2060
2061 static ssize_t
2062 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2063 {
2064         struct nct6775_data *data = nct6775_update_device(dev);
2065         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2066
2067         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2068 }
2069
2070 static ssize_t
2071 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2072                  const char *buf, size_t count)
2073 {
2074         struct nct6775_data *data = dev_get_drvdata(dev);
2075         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2076         int nr = sattr->index;
2077         unsigned long val;
2078         int err;
2079         u16 reg;
2080
2081         err = kstrtoul(buf, 10, &val);
2082         if (err < 0)
2083                 return err;
2084
2085         if (val > sf4)
2086                 return -EINVAL;
2087
2088         if (val == sf3 && data->kind != nct6775)
2089                 return -EINVAL;
2090
2091         if (val == sf4 && check_trip_points(data, nr)) {
2092                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2093                 dev_err(dev, "Adjust trip points and try again\n");
2094                 return -EINVAL;
2095         }
2096
2097         mutex_lock(&data->update_lock);
2098         data->pwm_enable[nr] = val;
2099         if (val == off) {
2100                 /*
2101                  * turn off pwm control: select manual mode, set pwm to maximum
2102                  */
2103                 data->pwm[0][nr] = 255;
2104                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2105         }
2106         pwm_update_registers(data, nr);
2107         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2108         reg &= 0x0f;
2109         reg |= pwm_enable_to_reg(val) << 4;
2110         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2111         mutex_unlock(&data->update_lock);
2112         return count;
2113 }
2114
2115 static ssize_t
2116 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2117 {
2118         int i, sel = 0;
2119
2120         for (i = 0; i < NUM_TEMP; i++) {
2121                 if (!(data->have_temp & (1 << i)))
2122                         continue;
2123                 if (src == data->temp_src[i]) {
2124                         sel = i + 1;
2125                         break;
2126                 }
2127         }
2128
2129         return sprintf(buf, "%d\n", sel);
2130 }
2131
2132 static ssize_t
2133 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2134 {
2135         struct nct6775_data *data = nct6775_update_device(dev);
2136         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2137         int index = sattr->index;
2138
2139         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2140 }
2141
2142 static ssize_t
2143 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2144                    const char *buf, size_t count)
2145 {
2146         struct nct6775_data *data = nct6775_update_device(dev);
2147         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2148         int nr = sattr->index;
2149         unsigned long val;
2150         int err, reg, src;
2151
2152         err = kstrtoul(buf, 10, &val);
2153         if (err < 0)
2154                 return err;
2155         if (val == 0 || val > NUM_TEMP)
2156                 return -EINVAL;
2157         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2158                 return -EINVAL;
2159
2160         mutex_lock(&data->update_lock);
2161         src = data->temp_src[val - 1];
2162         data->pwm_temp_sel[nr] = src;
2163         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2164         reg &= 0xe0;
2165         reg |= src;
2166         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2167         mutex_unlock(&data->update_lock);
2168
2169         return count;
2170 }
2171
2172 static ssize_t
2173 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2174                          char *buf)
2175 {
2176         struct nct6775_data *data = nct6775_update_device(dev);
2177         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2178         int index = sattr->index;
2179
2180         return show_pwm_temp_sel_common(data, buf,
2181                                         data->pwm_weight_temp_sel[index]);
2182 }
2183
2184 static ssize_t
2185 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2186                           const char *buf, size_t count)
2187 {
2188         struct nct6775_data *data = nct6775_update_device(dev);
2189         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2190         int nr = sattr->index;
2191         unsigned long val;
2192         int err, reg, src;
2193
2194         err = kstrtoul(buf, 10, &val);
2195         if (err < 0)
2196                 return err;
2197         if (val > NUM_TEMP)
2198                 return -EINVAL;
2199         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2200                     !data->temp_src[val - 1]))
2201                 return -EINVAL;
2202
2203         mutex_lock(&data->update_lock);
2204         if (val) {
2205                 src = data->temp_src[val - 1];
2206                 data->pwm_weight_temp_sel[nr] = src;
2207                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2208                 reg &= 0xe0;
2209                 reg |= (src | 0x80);
2210                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2211         } else {
2212                 data->pwm_weight_temp_sel[nr] = 0;
2213                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2214                 reg &= 0x7f;
2215                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2216         }
2217         mutex_unlock(&data->update_lock);
2218
2219         return count;
2220 }
2221
2222 static ssize_t
2223 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2224 {
2225         struct nct6775_data *data = nct6775_update_device(dev);
2226         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2227
2228         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2229 }
2230
2231 static ssize_t
2232 store_target_temp(struct device *dev, struct device_attribute *attr,
2233                   const char *buf, size_t count)
2234 {
2235         struct nct6775_data *data = dev_get_drvdata(dev);
2236         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2237         int nr = sattr->index;
2238         unsigned long val;
2239         int err;
2240
2241         err = kstrtoul(buf, 10, &val);
2242         if (err < 0)
2243                 return err;
2244
2245         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0,
2246                             data->target_temp_mask);
2247
2248         mutex_lock(&data->update_lock);
2249         data->target_temp[nr] = val;
2250         pwm_update_registers(data, nr);
2251         mutex_unlock(&data->update_lock);
2252         return count;
2253 }
2254
2255 static ssize_t
2256 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2257 {
2258         struct nct6775_data *data = nct6775_update_device(dev);
2259         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2260         int nr = sattr->index;
2261
2262         return sprintf(buf, "%d\n",
2263                        fan_from_reg16(data->target_speed[nr],
2264                                       data->fan_div[nr]));
2265 }
2266
2267 static ssize_t
2268 store_target_speed(struct device *dev, struct device_attribute *attr,
2269                    const char *buf, size_t count)
2270 {
2271         struct nct6775_data *data = dev_get_drvdata(dev);
2272         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2273         int nr = sattr->index;
2274         unsigned long val;
2275         int err;
2276         u16 speed;
2277
2278         err = kstrtoul(buf, 10, &val);
2279         if (err < 0)
2280                 return err;
2281
2282         val = SENSORS_LIMIT(val, 0, 1350000U);
2283         speed = fan_to_reg(val, data->fan_div[nr]);
2284
2285         mutex_lock(&data->update_lock);
2286         data->target_speed[nr] = speed;
2287         pwm_update_registers(data, nr);
2288         mutex_unlock(&data->update_lock);
2289         return count;
2290 }
2291
2292 static ssize_t
2293 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2294                     char *buf)
2295 {
2296         struct nct6775_data *data = nct6775_update_device(dev);
2297         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2298         int nr = sattr->nr;
2299         int index = sattr->index;
2300
2301         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2302 }
2303
2304 static ssize_t
2305 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2306                      const char *buf, size_t count)
2307 {
2308         struct nct6775_data *data = dev_get_drvdata(dev);
2309         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2310         int nr = sattr->nr;
2311         int index = sattr->index;
2312         unsigned long val;
2313         int err;
2314
2315         err = kstrtoul(buf, 10, &val);
2316         if (err < 0)
2317                 return err;
2318
2319         /* Limit tolerance as needed */
2320         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0,
2321                             data->tolerance_mask);
2322
2323         mutex_lock(&data->update_lock);
2324         data->temp_tolerance[index][nr] = val;
2325         if (index)
2326                 pwm_update_registers(data, nr);
2327         else
2328                 nct6775_write_value(data,
2329                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2330                                     val);
2331         mutex_unlock(&data->update_lock);
2332         return count;
2333 }
2334
2335 /*
2336  * Fan speed tolerance is a tricky beast, since the associated register is
2337  * a tick counter, but the value is reported and configured as rpm.
2338  * Compute resulting low and high rpm values and report the difference.
2339  */
2340 static ssize_t
2341 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2342                      char *buf)
2343 {
2344         struct nct6775_data *data = nct6775_update_device(dev);
2345         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2346         int nr = sattr->index;
2347         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2348         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2349         int tolerance;
2350
2351         if (low <= 0)
2352                 low = 1;
2353         if (high > 0xffff)
2354                 high = 0xffff;
2355         if (high < low)
2356                 high = low;
2357
2358         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2359                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2360
2361         return sprintf(buf, "%d\n", tolerance);
2362 }
2363
2364 static ssize_t
2365 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2366                       const char *buf, size_t count)
2367 {
2368         struct nct6775_data *data = dev_get_drvdata(dev);
2369         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2370         int nr = sattr->index;
2371         unsigned long val;
2372         int err;
2373         int low, high;
2374
2375         err = kstrtoul(buf, 10, &val);
2376         if (err < 0)
2377                 return err;
2378
2379         high = fan_from_reg16(data->target_speed[nr],
2380                               data->fan_div[nr]) + val;
2381         low = fan_from_reg16(data->target_speed[nr],
2382                              data->fan_div[nr]) - val;
2383         if (low <= 0)
2384                 low = 1;
2385         if (high < low)
2386                 high = low;
2387
2388         val = (fan_to_reg(low, data->fan_div[nr]) -
2389                fan_to_reg(high, data->fan_div[nr])) / 2;
2390
2391         /* Limit tolerance as needed */
2392         val = SENSORS_LIMIT(val, 0, data->speed_tolerance_limit);
2393
2394         mutex_lock(&data->update_lock);
2395         data->target_speed_tolerance[nr] = val;
2396         pwm_update_registers(data, nr);
2397         mutex_unlock(&data->update_lock);
2398         return count;
2399 }
2400
2401 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2402 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2403 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2404 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2405 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2406
2407 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2408                           store_pwm_mode, 0);
2409 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2410                           store_pwm_mode, 1);
2411 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2412                           store_pwm_mode, 2);
2413 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2414                           store_pwm_mode, 3);
2415 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2416                           store_pwm_mode, 4);
2417
2418 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2419                           store_pwm_enable, 0);
2420 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2421                           store_pwm_enable, 1);
2422 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2423                           store_pwm_enable, 2);
2424 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2425                           store_pwm_enable, 3);
2426 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2427                           store_pwm_enable, 4);
2428
2429 static SENSOR_DEVICE_ATTR(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2430                             show_pwm_temp_sel, store_pwm_temp_sel, 0);
2431 static SENSOR_DEVICE_ATTR(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2432                             show_pwm_temp_sel, store_pwm_temp_sel, 1);
2433 static SENSOR_DEVICE_ATTR(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2434                             show_pwm_temp_sel, store_pwm_temp_sel, 2);
2435 static SENSOR_DEVICE_ATTR(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2436                             show_pwm_temp_sel, store_pwm_temp_sel, 3);
2437 static SENSOR_DEVICE_ATTR(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2438                             show_pwm_temp_sel, store_pwm_temp_sel, 4);
2439
2440 static SENSOR_DEVICE_ATTR(pwm1_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2441                           store_target_temp, 0);
2442 static SENSOR_DEVICE_ATTR(pwm2_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2443                           store_target_temp, 1);
2444 static SENSOR_DEVICE_ATTR(pwm3_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2445                           store_target_temp, 2);
2446 static SENSOR_DEVICE_ATTR(pwm4_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2447                           store_target_temp, 3);
2448 static SENSOR_DEVICE_ATTR(pwm5_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2449                           store_target_temp, 4);
2450
2451 static SENSOR_DEVICE_ATTR(fan1_target, S_IWUSR | S_IRUGO, show_target_speed,
2452                           store_target_speed, 0);
2453 static SENSOR_DEVICE_ATTR(fan2_target, S_IWUSR | S_IRUGO, show_target_speed,
2454                           store_target_speed, 1);
2455 static SENSOR_DEVICE_ATTR(fan3_target, S_IWUSR | S_IRUGO, show_target_speed,
2456                           store_target_speed, 2);
2457 static SENSOR_DEVICE_ATTR(fan4_target, S_IWUSR | S_IRUGO, show_target_speed,
2458                           store_target_speed, 3);
2459 static SENSOR_DEVICE_ATTR(fan5_target, S_IWUSR | S_IRUGO, show_target_speed,
2460                           store_target_speed, 4);
2461
2462 static SENSOR_DEVICE_ATTR(fan1_tolerance, S_IWUSR | S_IRUGO,
2463                             show_speed_tolerance, store_speed_tolerance, 0);
2464 static SENSOR_DEVICE_ATTR(fan2_tolerance, S_IWUSR | S_IRUGO,
2465                             show_speed_tolerance, store_speed_tolerance, 1);
2466 static SENSOR_DEVICE_ATTR(fan3_tolerance, S_IWUSR | S_IRUGO,
2467                             show_speed_tolerance, store_speed_tolerance, 2);
2468 static SENSOR_DEVICE_ATTR(fan4_tolerance, S_IWUSR | S_IRUGO,
2469                             show_speed_tolerance, store_speed_tolerance, 3);
2470 static SENSOR_DEVICE_ATTR(fan5_tolerance, S_IWUSR | S_IRUGO,
2471                             show_speed_tolerance, store_speed_tolerance, 4);
2472
2473 /* Smart Fan registers */
2474
2475 static ssize_t
2476 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2477 {
2478         struct nct6775_data *data = nct6775_update_device(dev);
2479         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2480         int nr = sattr->nr;
2481         int index = sattr->index;
2482
2483         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2484 }
2485
2486 static ssize_t
2487 store_weight_temp(struct device *dev, struct device_attribute *attr,
2488                   const char *buf, size_t count)
2489 {
2490         struct nct6775_data *data = dev_get_drvdata(dev);
2491         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2492         int nr = sattr->nr;
2493         int index = sattr->index;
2494         unsigned long val;
2495         int err;
2496
2497         err = kstrtoul(buf, 10, &val);
2498         if (err < 0)
2499                 return err;
2500
2501         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2502
2503         mutex_lock(&data->update_lock);
2504         data->weight_temp[index][nr] = val;
2505         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2506         mutex_unlock(&data->update_lock);
2507         return count;
2508 }
2509
2510 static SENSOR_DEVICE_ATTR(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2511                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2512                             0);
2513 static SENSOR_DEVICE_ATTR(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2514                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2515                             1);
2516 static SENSOR_DEVICE_ATTR(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2517                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2518                             2);
2519 static SENSOR_DEVICE_ATTR(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2520                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2521                             3);
2522 static SENSOR_DEVICE_ATTR(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2523                             show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2524                             4);
2525
2526 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2527                             show_weight_temp, store_weight_temp, 0, 0);
2528 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2529                             show_weight_temp, store_weight_temp, 1, 0);
2530 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2531                             show_weight_temp, store_weight_temp, 2, 0);
2532 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2533                             show_weight_temp, store_weight_temp, 3, 0);
2534 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2535                             show_weight_temp, store_weight_temp, 4, 0);
2536
2537 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2538                             show_weight_temp, store_weight_temp, 0, 1);
2539 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2540                             show_weight_temp, store_weight_temp, 1, 1);
2541 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2542                             show_weight_temp, store_weight_temp, 2, 1);
2543 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2544                             show_weight_temp, store_weight_temp, 3, 1);
2545 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2546                             show_weight_temp, store_weight_temp, 4, 1);
2547
2548 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2549                             show_weight_temp, store_weight_temp, 0, 2);
2550 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2551                             show_weight_temp, store_weight_temp, 1, 2);
2552 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2553                             show_weight_temp, store_weight_temp, 2, 2);
2554 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2555                             show_weight_temp, store_weight_temp, 3, 2);
2556 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2557                             show_weight_temp, store_weight_temp, 4, 2);
2558
2559 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2560                             show_pwm, store_pwm, 0, 5);
2561 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2562                             show_pwm, store_pwm, 1, 5);
2563 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2564                             show_pwm, store_pwm, 2, 5);
2565 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2566                             show_pwm, store_pwm, 3, 5);
2567 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2568                             show_pwm, store_pwm, 4, 5);
2569
2570 /* duty_base is not supported on all chips */
2571 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2572         SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2573                       show_pwm, store_pwm, 0, 6),
2574         SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2575                       show_pwm, store_pwm, 1, 6),
2576         SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2577                       show_pwm, store_pwm, 2, 6),
2578         SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2579                       show_pwm, store_pwm, 3, 6),
2580         SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2581                       show_pwm, store_pwm, 4, 6),
2582 };
2583
2584 static ssize_t
2585 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2586 {
2587         struct nct6775_data *data = nct6775_update_device(dev);
2588         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2589         int nr = sattr->nr;
2590         int index = sattr->index;
2591
2592         return sprintf(buf, "%d\n",
2593                        step_time_from_reg(data->fan_time[index][nr],
2594                                           data->pwm_mode[nr]));
2595 }
2596
2597 static ssize_t
2598 store_fan_time(struct device *dev, struct device_attribute *attr,
2599                const char *buf, size_t count)
2600 {
2601         struct nct6775_data *data = dev_get_drvdata(dev);
2602         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2603         int nr = sattr->nr;
2604         int index = sattr->index;
2605         unsigned long val;
2606         int err;
2607
2608         err = kstrtoul(buf, 10, &val);
2609         if (err < 0)
2610                 return err;
2611
2612         val = step_time_to_reg(val, data->pwm_mode[nr]);
2613         mutex_lock(&data->update_lock);
2614         data->fan_time[index][nr] = val;
2615         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2616         mutex_unlock(&data->update_lock);
2617         return count;
2618 }
2619
2620 static ssize_t
2621 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2622 {
2623         struct nct6775_data *data = dev_get_drvdata(dev);
2624
2625         return sprintf(buf, "%s\n", data->name);
2626 }
2627
2628 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2629
2630 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2631                             store_fan_time, 0, 0);
2632 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2633                             store_fan_time, 1, 0);
2634 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2635                             store_fan_time, 2, 0);
2636 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2637                             store_fan_time, 3, 0);
2638 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2639                             store_fan_time, 4, 0);
2640
2641 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2642                             store_fan_time, 0, 1);
2643 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2644                             store_fan_time, 1, 1);
2645 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2646                             store_fan_time, 2, 1);
2647 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2648                             store_fan_time, 3, 1);
2649 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2650                             store_fan_time, 4, 1);
2651
2652 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2653                             show_fan_time, store_fan_time, 0, 2);
2654 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2655                             show_fan_time, store_fan_time, 1, 2);
2656 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2657                             show_fan_time, store_fan_time, 2, 2);
2658 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2659                             show_fan_time, store_fan_time, 3, 2);
2660 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2661                             show_fan_time, store_fan_time, 4, 2);
2662
2663 static SENSOR_DEVICE_ATTR_2(pwm1_start, S_IWUSR | S_IRUGO, show_pwm,
2664                             store_pwm, 0, 1);
2665 static SENSOR_DEVICE_ATTR_2(pwm2_start, S_IWUSR | S_IRUGO, show_pwm,
2666                             store_pwm, 1, 1);
2667 static SENSOR_DEVICE_ATTR_2(pwm3_start, S_IWUSR | S_IRUGO, show_pwm,
2668                             store_pwm, 2, 1);
2669 static SENSOR_DEVICE_ATTR_2(pwm4_start, S_IWUSR | S_IRUGO, show_pwm,
2670                             store_pwm, 3, 1);
2671 static SENSOR_DEVICE_ATTR_2(pwm5_start, S_IWUSR | S_IRUGO, show_pwm,
2672                             store_pwm, 4, 1);
2673
2674 static SENSOR_DEVICE_ATTR_2(pwm1_floor, S_IWUSR | S_IRUGO, show_pwm,
2675                             store_pwm, 0, 2);
2676 static SENSOR_DEVICE_ATTR_2(pwm2_floor, S_IWUSR | S_IRUGO, show_pwm,
2677                             store_pwm, 1, 2);
2678 static SENSOR_DEVICE_ATTR_2(pwm3_floor, S_IWUSR | S_IRUGO, show_pwm,
2679                             store_pwm, 2, 2);
2680 static SENSOR_DEVICE_ATTR_2(pwm4_floor, S_IWUSR | S_IRUGO, show_pwm,
2681                             store_pwm, 3, 2);
2682 static SENSOR_DEVICE_ATTR_2(pwm5_floor, S_IWUSR | S_IRUGO, show_pwm,
2683                             store_pwm, 4, 2);
2684
2685 static SENSOR_DEVICE_ATTR_2(pwm1_temp_tolerance, S_IWUSR | S_IRUGO,
2686                             show_temp_tolerance, store_temp_tolerance, 0, 0);
2687 static SENSOR_DEVICE_ATTR_2(pwm2_temp_tolerance, S_IWUSR | S_IRUGO,
2688                             show_temp_tolerance, store_temp_tolerance, 1, 0);
2689 static SENSOR_DEVICE_ATTR_2(pwm3_temp_tolerance, S_IWUSR | S_IRUGO,
2690                             show_temp_tolerance, store_temp_tolerance, 2, 0);
2691 static SENSOR_DEVICE_ATTR_2(pwm4_temp_tolerance, S_IWUSR | S_IRUGO,
2692                             show_temp_tolerance, store_temp_tolerance, 3, 0);
2693 static SENSOR_DEVICE_ATTR_2(pwm5_temp_tolerance, S_IWUSR | S_IRUGO,
2694                             show_temp_tolerance, store_temp_tolerance, 4, 0);
2695
2696 static SENSOR_DEVICE_ATTR_2(pwm1_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2697                             show_temp_tolerance, store_temp_tolerance, 0, 1);
2698 static SENSOR_DEVICE_ATTR_2(pwm2_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2699                             show_temp_tolerance, store_temp_tolerance, 1, 1);
2700 static SENSOR_DEVICE_ATTR_2(pwm3_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2701                             show_temp_tolerance, store_temp_tolerance, 2, 1);
2702 static SENSOR_DEVICE_ATTR_2(pwm4_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2703                             show_temp_tolerance, store_temp_tolerance, 3, 1);
2704 static SENSOR_DEVICE_ATTR_2(pwm5_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2705                             show_temp_tolerance, store_temp_tolerance, 4, 1);
2706
2707 /* pwm_max is not supported on all chips */
2708 static struct sensor_device_attribute_2 sda_pwm_max[] = {
2709         SENSOR_ATTR_2(pwm1_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2710                       0, 3),
2711         SENSOR_ATTR_2(pwm2_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2712                       1, 3),
2713         SENSOR_ATTR_2(pwm3_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2714                       2, 3),
2715         SENSOR_ATTR_2(pwm4_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2716                       3, 3),
2717         SENSOR_ATTR_2(pwm5_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2718                       4, 3),
2719 };
2720
2721 /* pwm_step is not supported on all chips */
2722 static struct sensor_device_attribute_2 sda_pwm_step[] = {
2723         SENSOR_ATTR_2(pwm1_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 4),
2724         SENSOR_ATTR_2(pwm2_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 4),
2725         SENSOR_ATTR_2(pwm3_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 4),
2726         SENSOR_ATTR_2(pwm4_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 4),
2727         SENSOR_ATTR_2(pwm5_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 4),
2728 };
2729
2730 static struct attribute *nct6775_attributes_pwm[5][20] = {
2731         {
2732                 &sensor_dev_attr_pwm1.dev_attr.attr,
2733                 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2734                 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2735                 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2736                 &sensor_dev_attr_pwm1_temp_tolerance.dev_attr.attr,
2737                 &sensor_dev_attr_pwm1_crit_temp_tolerance.dev_attr.attr,
2738                 &sensor_dev_attr_pwm1_target_temp.dev_attr.attr,
2739                 &sensor_dev_attr_fan1_target.dev_attr.attr,
2740                 &sensor_dev_attr_fan1_tolerance.dev_attr.attr,
2741                 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2742                 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2743                 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2744                 &sensor_dev_attr_pwm1_start.dev_attr.attr,
2745                 &sensor_dev_attr_pwm1_floor.dev_attr.attr,
2746                 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2747                 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2748                 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2749                 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2750                 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2751                 NULL
2752         },
2753         {
2754                 &sensor_dev_attr_pwm2.dev_attr.attr,
2755                 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2756                 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2757                 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2758                 &sensor_dev_attr_pwm2_temp_tolerance.dev_attr.attr,
2759                 &sensor_dev_attr_pwm2_crit_temp_tolerance.dev_attr.attr,
2760                 &sensor_dev_attr_pwm2_target_temp.dev_attr.attr,
2761                 &sensor_dev_attr_fan2_target.dev_attr.attr,
2762                 &sensor_dev_attr_fan2_tolerance.dev_attr.attr,
2763                 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2764                 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2765                 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2766                 &sensor_dev_attr_pwm2_start.dev_attr.attr,
2767                 &sensor_dev_attr_pwm2_floor.dev_attr.attr,
2768                 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2769                 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2770                 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2771                 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2772                 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2773                 NULL
2774         },
2775         {
2776                 &sensor_dev_attr_pwm3.dev_attr.attr,
2777                 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2778                 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2779                 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2780                 &sensor_dev_attr_pwm3_temp_tolerance.dev_attr.attr,
2781                 &sensor_dev_attr_pwm3_crit_temp_tolerance.dev_attr.attr,
2782                 &sensor_dev_attr_pwm3_target_temp.dev_attr.attr,
2783                 &sensor_dev_attr_fan3_target.dev_attr.attr,
2784                 &sensor_dev_attr_fan3_tolerance.dev_attr.attr,
2785                 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2786                 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2787                 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2788                 &sensor_dev_attr_pwm3_start.dev_attr.attr,
2789                 &sensor_dev_attr_pwm3_floor.dev_attr.attr,
2790                 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2791                 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2792                 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2793                 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2794                 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2795                 NULL
2796         },
2797         {
2798                 &sensor_dev_attr_pwm4.dev_attr.attr,
2799                 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2800                 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2801                 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2802                 &sensor_dev_attr_pwm4_temp_tolerance.dev_attr.attr,
2803                 &sensor_dev_attr_pwm4_crit_temp_tolerance.dev_attr.attr,
2804                 &sensor_dev_attr_pwm4_target_temp.dev_attr.attr,
2805                 &sensor_dev_attr_fan4_target.dev_attr.attr,
2806                 &sensor_dev_attr_fan4_tolerance.dev_attr.attr,
2807                 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2808                 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2809                 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2810                 &sensor_dev_attr_pwm4_start.dev_attr.attr,
2811                 &sensor_dev_attr_pwm4_floor.dev_attr.attr,
2812                 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2813                 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2814                 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2815                 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2816                 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2817                 NULL
2818         },
2819         {
2820                 &sensor_dev_attr_pwm5.dev_attr.attr,
2821                 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2822                 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2823                 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2824                 &sensor_dev_attr_pwm5_temp_tolerance.dev_attr.attr,
2825                 &sensor_dev_attr_pwm5_crit_temp_tolerance.dev_attr.attr,
2826                 &sensor_dev_attr_pwm5_target_temp.dev_attr.attr,
2827                 &sensor_dev_attr_fan5_target.dev_attr.attr,
2828                 &sensor_dev_attr_fan5_tolerance.dev_attr.attr,
2829                 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2830                 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2831                 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2832                 &sensor_dev_attr_pwm5_start.dev_attr.attr,
2833                 &sensor_dev_attr_pwm5_floor.dev_attr.attr,
2834                 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2835                 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2836                 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2837                 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2838                 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2839                 NULL
2840         },
2841 };
2842
2843 static const struct attribute_group nct6775_group_pwm[5] = {
2844         { .attrs = nct6775_attributes_pwm[0] },
2845         { .attrs = nct6775_attributes_pwm[1] },
2846         { .attrs = nct6775_attributes_pwm[2] },
2847         { .attrs = nct6775_attributes_pwm[3] },
2848         { .attrs = nct6775_attributes_pwm[4] },
2849 };
2850
2851 static ssize_t
2852 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2853 {
2854         struct nct6775_data *data = nct6775_update_device(dev);
2855         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2856
2857         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2858 }
2859
2860 static ssize_t
2861 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2862                const char *buf, size_t count)
2863 {
2864         struct nct6775_data *data = dev_get_drvdata(dev);
2865         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2866         int nr = sattr->nr;
2867         int point = sattr->index;
2868         unsigned long val;
2869         int err;
2870         u8 reg;
2871
2872         err = kstrtoul(buf, 10, &val);
2873         if (err < 0)
2874                 return err;
2875         if (val > 255)
2876                 return -EINVAL;
2877
2878         if (point == data->auto_pwm_num) {
2879                 if (data->kind != nct6775 && !val)
2880                         return -EINVAL;
2881                 if (data->kind != nct6779 && val)
2882                         val = 0xff;
2883         }
2884
2885         mutex_lock(&data->update_lock);
2886         data->auto_pwm[nr][point] = val;
2887         if (point < data->auto_pwm_num) {
2888                 nct6775_write_value(data,
2889                                     NCT6775_AUTO_PWM(data, nr, point),
2890                                     data->auto_pwm[nr][point]);
2891         } else {
2892                 switch (data->kind) {
2893                 case nct6775:
2894                         /* disable if needed (pwm == 0) */
2895                         reg = nct6775_read_value(data,
2896                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2897                         if (val)
2898                                 reg |= 0x02;
2899                         else
2900                                 reg &= ~0x02;
2901                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2902                                             reg);
2903                         break;
2904                 case nct6776:
2905                         break; /* always enabled, nothing to do */
2906                 case nct6779:
2907                         nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2908                                             val);
2909                         reg = nct6775_read_value(data,
2910                                         NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2911                         if (val == 255)
2912                                 reg &= ~0x01;
2913                         else
2914                                 reg |= 0x01;
2915                         nct6775_write_value(data,
2916                                             NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2917                                             reg);
2918                         break;
2919                 }
2920         }
2921         mutex_unlock(&data->update_lock);
2922         return count;
2923 }
2924
2925 static ssize_t
2926 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2927 {
2928         struct nct6775_data *data = nct6775_update_device(dev);
2929         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2930         int nr = sattr->nr;
2931         int point = sattr->index;
2932
2933         /*
2934          * We don't know for sure if the temperature is signed or unsigned.
2935          * Assume it is unsigned.
2936          */
2937         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2938 }
2939
2940 static ssize_t
2941 store_auto_temp(struct device *dev, struct device_attribute *attr,
2942                 const char *buf, size_t count)
2943 {
2944         struct nct6775_data *data = dev_get_drvdata(dev);
2945         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2946         int nr = sattr->nr;
2947         int point = sattr->index;
2948         unsigned long val;
2949         int err;
2950
2951         err = kstrtoul(buf, 10, &val);
2952         if (err)
2953                 return err;
2954         if (val > 255000)
2955                 return -EINVAL;
2956
2957         mutex_lock(&data->update_lock);
2958         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2959         if (point < data->auto_pwm_num) {
2960                 nct6775_write_value(data,
2961                                     NCT6775_AUTO_TEMP(data, nr, point),
2962                                     data->auto_temp[nr][point]);
2963         } else {
2964                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2965                                     data->auto_temp[nr][point]);
2966         }
2967         mutex_unlock(&data->update_lock);
2968         return count;
2969 }
2970
2971 /*
2972  * The number of auto-point trip points is chip dependent.
2973  * Need to check support while generating/removing attribute files.
2974  */
2975 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2976         SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2977                       show_auto_pwm, store_auto_pwm, 0, 0),
2978         SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2979                       show_auto_temp, store_auto_temp, 0, 0),
2980         SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2981                       show_auto_pwm, store_auto_pwm, 0, 1),
2982         SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2983                       show_auto_temp, store_auto_temp, 0, 1),
2984         SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2985                       show_auto_pwm, store_auto_pwm, 0, 2),
2986         SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2987                       show_auto_temp, store_auto_temp, 0, 2),
2988         SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2989                       show_auto_pwm, store_auto_pwm, 0, 3),
2990         SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2991                       show_auto_temp, store_auto_temp, 0, 3),
2992         SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2993                       show_auto_pwm, store_auto_pwm, 0, 4),
2994         SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2995                       show_auto_temp, store_auto_temp, 0, 4),
2996         SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2997                       show_auto_pwm, store_auto_pwm, 0, 5),
2998         SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2999                       show_auto_temp, store_auto_temp, 0, 5),
3000         SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
3001                       show_auto_pwm, store_auto_pwm, 0, 6),
3002         SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
3003                       show_auto_temp, store_auto_temp, 0, 6),
3004
3005         SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
3006                       show_auto_pwm, store_auto_pwm, 1, 0),
3007         SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
3008                       show_auto_temp, store_auto_temp, 1, 0),
3009         SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
3010                       show_auto_pwm, store_auto_pwm, 1, 1),
3011         SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
3012                       show_auto_temp, store_auto_temp, 1, 1),
3013         SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
3014                       show_auto_pwm, store_auto_pwm, 1, 2),
3015         SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
3016                       show_auto_temp, store_auto_temp, 1, 2),
3017         SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
3018                       show_auto_pwm, store_auto_pwm, 1, 3),
3019         SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
3020                       show_auto_temp, store_auto_temp, 1, 3),
3021         SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
3022                       show_auto_pwm, store_auto_pwm, 1, 4),
3023         SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
3024                       show_auto_temp, store_auto_temp, 1, 4),
3025         SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
3026                       show_auto_pwm, store_auto_pwm, 1, 5),
3027         SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
3028                       show_auto_temp, store_auto_temp, 1, 5),
3029         SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
3030                       show_auto_pwm, store_auto_pwm, 1, 6),
3031         SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
3032                       show_auto_temp, store_auto_temp, 1, 6),
3033
3034         SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
3035                       show_auto_pwm, store_auto_pwm, 2, 0),
3036         SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
3037                       show_auto_temp, store_auto_temp, 2, 0),
3038         SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
3039                       show_auto_pwm, store_auto_pwm, 2, 1),
3040         SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
3041                       show_auto_temp, store_auto_temp, 2, 1),
3042         SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
3043                       show_auto_pwm, store_auto_pwm, 2, 2),
3044         SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
3045                       show_auto_temp, store_auto_temp, 2, 2),
3046         SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
3047                       show_auto_pwm, store_auto_pwm, 2, 3),
3048         SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
3049                       show_auto_temp, store_auto_temp, 2, 3),
3050         SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
3051                       show_auto_pwm, store_auto_pwm, 2, 4),
3052         SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
3053                       show_auto_temp, store_auto_temp, 2, 4),
3054         SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
3055                       show_auto_pwm, store_auto_pwm, 2, 5),
3056         SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
3057                       show_auto_temp, store_auto_temp, 2, 5),
3058         SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
3059                       show_auto_pwm, store_auto_pwm, 2, 6),
3060         SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
3061                       show_auto_temp, store_auto_temp, 2, 6),
3062
3063         SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
3064                       show_auto_pwm, store_auto_pwm, 3, 0),
3065         SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
3066                       show_auto_temp, store_auto_temp, 3, 0),
3067         SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
3068                       show_auto_pwm, store_auto_pwm, 3, 1),
3069         SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
3070                       show_auto_temp, store_auto_temp, 3, 1),
3071         SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
3072                       show_auto_pwm, store_auto_pwm, 3, 2),
3073         SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
3074                       show_auto_temp, store_auto_temp, 3, 2),
3075         SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
3076                       show_auto_pwm, store_auto_pwm, 3, 3),
3077         SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
3078                       show_auto_temp, store_auto_temp, 3, 3),
3079         SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
3080                       show_auto_pwm, store_auto_pwm, 3, 4),
3081         SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
3082                       show_auto_temp, store_auto_temp, 3, 4),
3083         SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
3084                       show_auto_pwm, store_auto_pwm, 3, 5),
3085         SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
3086                       show_auto_temp, store_auto_temp, 3, 5),
3087         SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
3088                       show_auto_pwm, store_auto_pwm, 3, 6),
3089         SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
3090                       show_auto_temp, store_auto_temp, 3, 6),
3091
3092         SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
3093                       show_auto_pwm, store_auto_pwm, 4, 0),
3094         SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
3095                       show_auto_temp, store_auto_temp, 4, 0),
3096         SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
3097                       show_auto_pwm, store_auto_pwm, 4, 1),
3098         SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
3099                       show_auto_temp, store_auto_temp, 4, 1),
3100         SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
3101                       show_auto_pwm, store_auto_pwm, 4, 2),
3102         SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
3103                       show_auto_temp, store_auto_temp, 4, 2),
3104         SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
3105                       show_auto_pwm, store_auto_pwm, 4, 3),
3106         SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
3107                       show_auto_temp, store_auto_temp, 4, 3),
3108         SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
3109                       show_auto_pwm, store_auto_pwm, 4, 4),
3110         SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
3111                       show_auto_temp, store_auto_temp, 4, 4),
3112         SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
3113                       show_auto_pwm, store_auto_pwm, 4, 5),
3114         SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
3115                       show_auto_temp, store_auto_temp, 4, 5),
3116         SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
3117                       show_auto_pwm, store_auto_pwm, 4, 6),
3118         SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
3119                       show_auto_temp, store_auto_temp, 4, 6),
3120 };
3121
3122 static ssize_t
3123 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3124 {
3125         struct nct6775_data *data = dev_get_drvdata(dev);
3126         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3127 }
3128
3129 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3130
3131 /* Case open detection */
3132
3133 static ssize_t
3134 clear_caseopen(struct device *dev, struct device_attribute *attr,
3135                const char *buf, size_t count)
3136 {
3137         struct nct6775_data *data = dev_get_drvdata(dev);
3138         struct nct6775_sio_data *sio_data = dev->platform_data;
3139         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3140         unsigned long val;
3141         u8 reg;
3142         int ret;
3143
3144         if (kstrtoul(buf, 10, &val) || val != 0)
3145                 return -EINVAL;
3146
3147         mutex_lock(&data->update_lock);
3148
3149         /*
3150          * Use CR registers to clear caseopen status.
3151          * The CR registers are the same for all chips, and not all chips
3152          * support clearing the caseopen status through "regular" registers.
3153          */
3154         ret = superio_enter(sio_data->sioreg);
3155         if (ret) {
3156                 count = ret;
3157                 goto error;
3158         }
3159
3160         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3161         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3162         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3163         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3164         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3165         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3166         superio_exit(sio_data->sioreg);
3167
3168         data->valid = false;    /* Force cache refresh */
3169 error:
3170         mutex_unlock(&data->update_lock);
3171         return count;
3172 }
3173
3174 static struct sensor_device_attribute sda_caseopen[] = {
3175         SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3176                     clear_caseopen, INTRUSION_ALARM_BASE),
3177         SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3178                     clear_caseopen, INTRUSION_ALARM_BASE + 1),
3179 };
3180
3181 /*
3182  * Driver and device management
3183  */
3184
3185 static void nct6775_device_remove_files(struct device *dev)
3186 {
3187         /*
3188          * some entries in the following arrays may not have been used in
3189          * device_create_file(), but device_remove_file() will ignore them
3190          */
3191         int i;
3192         struct nct6775_data *data = dev_get_drvdata(dev);
3193
3194         for (i = 0; i < data->pwm_num; i++)
3195                 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
3196
3197         for (i = 0; i < ARRAY_SIZE(sda_pwm_max); i++)
3198                 device_remove_file(dev, &sda_pwm_max[i].dev_attr);
3199
3200         for (i = 0; i < ARRAY_SIZE(sda_pwm_step); i++)
3201                 device_remove_file(dev, &sda_pwm_step[i].dev_attr);
3202
3203         for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
3204                 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
3205
3206         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
3207                 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
3208
3209         for (i = 0; i < data->in_num; i++)
3210                 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
3211
3212         for (i = 0; i < 5; i++) {
3213                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
3214                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
3215                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
3216                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
3217                 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
3218         }
3219         for (i = 0; i < NUM_TEMP; i++) {
3220                 if (!(data->have_temp & (1 << i)))
3221                         continue;
3222                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
3223                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
3224                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
3225                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
3226                 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
3227                 if (!(data->have_temp_fixed & (1 << i)))
3228                         continue;
3229                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
3230                 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
3231                 if (i >= NUM_TEMP_ALARM)
3232                         continue;
3233                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
3234         }
3235
3236         device_remove_file(dev, &sda_caseopen[0].dev_attr);
3237         device_remove_file(dev, &sda_caseopen[1].dev_attr);
3238
3239         device_remove_file(dev, &dev_attr_name);
3240         device_remove_file(dev, &dev_attr_cpu0_vid);
3241 }
3242
3243 /* Get the monitoring functions started */
3244 static inline void nct6775_init_device(struct nct6775_data *data)
3245 {
3246         int i;
3247         u8 tmp, diode;
3248
3249         /* Start monitoring if needed */
3250         if (data->REG_CONFIG) {
3251                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3252                 if (!(tmp & 0x01))
3253                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3254         }
3255
3256         /* Enable temperature sensors if needed */
3257         for (i = 0; i < NUM_TEMP; i++) {
3258                 if (!(data->have_temp & (1 << i)))
3259                         continue;
3260                 if (!data->reg_temp_config[i])
3261                         continue;
3262                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3263                 if (tmp & 0x01)
3264                         nct6775_write_value(data, data->reg_temp_config[i],
3265                                             tmp & 0xfe);
3266         }
3267
3268         /* Enable VBAT monitoring if needed */
3269         tmp = nct6775_read_value(data, data->REG_VBAT);
3270         if (!(tmp & 0x01))
3271                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3272
3273         diode = nct6775_read_value(data, data->REG_DIODE);
3274
3275         for (i = 0; i < data->temp_fixed_num; i++) {
3276                 if (!(data->have_temp_fixed & (1 << i)))
3277                         continue;
3278                 if ((tmp & (0x02 << i)))        /* diode */
3279                         data->temp_type[i] = 3 - ((diode >> i) & 0x02);
3280                 else                            /* thermistor */
3281                         data->temp_type[i] = 4;
3282         }
3283 }
3284
3285 static int
3286 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3287                          struct nct6775_data *data)
3288 {
3289         int regval;
3290         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3291         bool pwm3pin, pwm4pin, pwm5pin;
3292         int ret;
3293
3294         ret = superio_enter(sio_data->sioreg);
3295         if (ret)
3296                 return ret;
3297
3298         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3299         if (data->kind == nct6775) {
3300                 regval = superio_inb(sio_data->sioreg, 0x2c);
3301
3302                 fan3pin = regval & (1 << 6);
3303                 fan3min = fan3pin;
3304                 pwm3pin = regval & (1 << 7);
3305
3306                 /* On NCT6775, fan4 shares pins with the fdc interface */
3307                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3308                 fan4min = 0;
3309                 fan5pin = 0;
3310                 pwm4pin = 0;
3311                 pwm5pin = 0;
3312         } else if (data->kind == nct6776) {
3313                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3314
3315                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3316                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3317
3318                 if (regval & 0x80)
3319                         fan3pin = gpok;
3320                 else
3321                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3322
3323                 if (regval & 0x40)
3324                         fan4pin = gpok;
3325                 else
3326                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3327
3328                 if (regval & 0x20)
3329                         fan5pin = gpok;
3330                 else
3331                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3332
3333                 fan4min = fan4pin;
3334                 fan3min = fan3pin;
3335                 pwm3pin = fan3pin;
3336                 pwm4pin = 0;
3337                 pwm5pin = 0;
3338         } else {        /* NCT6779D */
3339                 regval = superio_inb(sio_data->sioreg, 0x1c);
3340
3341                 fan3pin = !(regval & (1 << 5));
3342                 fan4pin = !(regval & (1 << 6));
3343                 fan5pin = !(regval & (1 << 7));
3344
3345                 pwm3pin = !(regval & (1 << 0));
3346                 pwm4pin = !(regval & (1 << 1));
3347                 pwm5pin = !(regval & (1 << 2));
3348
3349                 fan3min = fan3pin;
3350                 fan4min = fan4pin;
3351         }
3352
3353         superio_exit(sio_data->sioreg);
3354
3355         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3356         data->has_fan |= fan3pin << 2;
3357         data->has_fan_min |= fan3min << 2;
3358
3359         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3360         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3361
3362         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3363
3364         return 0;
3365 }
3366
3367 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3368                              int *available, int *mask)
3369 {
3370         int i;
3371         u8 src;
3372
3373         for (i = 0; i < data->pwm_num && *available; i++) {
3374                 int index;
3375
3376                 if (!regp[i])
3377                         continue;
3378                 src = nct6775_read_value(data, regp[i]);
3379                 src &= 0x1f;
3380                 if (!src || (*mask & (1 << src)))
3381                         continue;
3382                 if (src >= data->temp_label_num ||
3383                     !strlen(data->temp_label[src]))
3384                         continue;
3385
3386                 index = __ffs(*available);
3387                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3388                 *available &= ~(1 << index);
3389                 *mask |= 1 << src;
3390         }
3391 }
3392
3393 static int nct6775_probe(struct platform_device *pdev)
3394 {
3395         struct device *dev = &pdev->dev;
3396         struct nct6775_sio_data *sio_data = dev->platform_data;
3397         struct nct6775_data *data;
3398         struct resource *res;
3399         int i, s, err = 0;
3400         int src, mask, available;
3401         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3402         const u16 *reg_temp_alternate, *reg_temp_crit;
3403         int num_reg_temp;
3404         bool have_vid = false;
3405         u8 cr2a;
3406
3407         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3408         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3409                                  DRVNAME))
3410                 return -EBUSY;
3411
3412         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3413                             GFP_KERNEL);
3414         if (!data)
3415                 return -ENOMEM;
3416
3417         data->kind = sio_data->kind;
3418         data->addr = res->start;
3419         mutex_init(&data->lock);
3420         mutex_init(&data->update_lock);
3421         data->name = nct6775_device_names[data->kind];
3422         data->bank = 0xff;              /* Force initial bank selection */
3423         platform_set_drvdata(pdev, data);
3424
3425         switch (data->kind) {
3426         case nct6775:
3427                 data->in_num = 9;
3428                 data->pwm_num = 3;
3429                 data->auto_pwm_num = 6;
3430                 data->has_fan_div = true;
3431                 data->temp_fixed_num = 3;
3432
3433                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3434
3435                 data->fan_from_reg = fan_from_reg16;
3436                 data->fan_from_reg_min = fan_from_reg8;
3437                 data->target_temp_mask = 0x7f;
3438                 data->tolerance_mask = 0x0f;
3439                 data->speed_tolerance_limit = 15;
3440
3441                 data->temp_label = nct6775_temp_label;
3442                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3443
3444                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3445                 data->REG_VBAT = NCT6775_REG_VBAT;
3446                 data->REG_DIODE = NCT6775_REG_DIODE;
3447                 data->REG_VIN = NCT6775_REG_IN;
3448                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3449                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3450                 data->REG_TARGET = NCT6775_REG_TARGET;
3451                 data->REG_FAN = NCT6775_REG_FAN;
3452                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3453                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3454                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3455                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3456                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3457                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3458                 data->REG_PWM[0] = NCT6775_REG_PWM;
3459                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3460                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3461                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3462                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3463                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3464                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3465                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3466                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3467                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3468                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3469                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3470                 data->REG_CRITICAL_TEMP_TOLERANCE
3471                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3472                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3473                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3474                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3475                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3476                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3477                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3478                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3479                 data->REG_ALARM = NCT6775_REG_ALARM;
3480
3481                 reg_temp = NCT6775_REG_TEMP;
3482                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3483                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3484                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3485                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3486                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3487                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3488
3489                 break;
3490         case nct6776:
3491                 data->in_num = 9;
3492                 data->pwm_num = 3;
3493                 data->auto_pwm_num = 4;
3494                 data->has_fan_div = false;
3495                 data->temp_fixed_num = 3;
3496
3497                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3498
3499                 data->fan_from_reg = fan_from_reg13;
3500                 data->fan_from_reg_min = fan_from_reg13;
3501                 data->target_temp_mask = 0xff;
3502                 data->tolerance_mask = 0x07;
3503                 data->speed_tolerance_limit = 63;
3504
3505                 data->temp_label = nct6776_temp_label;
3506                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3507
3508                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3509                 data->REG_VBAT = NCT6775_REG_VBAT;
3510                 data->REG_DIODE = NCT6775_REG_DIODE;
3511                 data->REG_VIN = NCT6775_REG_IN;
3512                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3513                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3514                 data->REG_TARGET = NCT6775_REG_TARGET;
3515                 data->REG_FAN = NCT6775_REG_FAN;
3516                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3517                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3518                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3519                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3520                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3521                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3522                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3523                 data->REG_PWM[0] = NCT6775_REG_PWM;
3524                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3525                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3526                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3527                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3528                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3529                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3530                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3531                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3532                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3533                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3534                 data->REG_CRITICAL_TEMP_TOLERANCE
3535                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3536                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3537                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3538                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3539                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3540                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3541                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3542                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3543                 data->REG_ALARM = NCT6775_REG_ALARM;
3544
3545                 reg_temp = NCT6775_REG_TEMP;
3546                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3547                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3548                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3549                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3550                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3551                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3552
3553                 break;
3554         case nct6779:
3555                 data->in_num = 15;
3556                 data->pwm_num = 5;
3557                 data->auto_pwm_num = 4;
3558                 data->has_fan_div = false;
3559                 data->temp_fixed_num = 6;
3560
3561                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3562
3563                 data->fan_from_reg = fan_from_reg13;
3564                 data->fan_from_reg_min = fan_from_reg13;
3565                 data->target_temp_mask = 0xff;
3566                 data->tolerance_mask = 0x07;
3567                 data->speed_tolerance_limit = 63;
3568
3569                 data->temp_label = nct6779_temp_label;
3570                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3571
3572                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3573                 data->REG_VBAT = NCT6775_REG_VBAT;
3574                 data->REG_DIODE = NCT6775_REG_DIODE;
3575                 data->REG_VIN = NCT6779_REG_IN;
3576                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3577                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3578                 data->REG_TARGET = NCT6775_REG_TARGET;
3579                 data->REG_FAN = NCT6779_REG_FAN;
3580                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3581                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3582                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3583                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3584                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3585                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3586                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3587                 data->REG_PWM[0] = NCT6775_REG_PWM;
3588                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3589                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3590                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3591                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3592                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3593                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3594                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3595                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3596                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3597                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3598                 data->REG_CRITICAL_TEMP_TOLERANCE
3599                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3600                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3601                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3602                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3603                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3604                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3605                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3606                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3607                 data->REG_ALARM = NCT6779_REG_ALARM;
3608
3609                 reg_temp = NCT6779_REG_TEMP;
3610                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3611                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3612                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3613                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3614                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3615                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3616
3617                 break;
3618         default:
3619                 return -ENODEV;
3620         }
3621         data->have_in = (1 << data->in_num) - 1;
3622         data->have_temp = 0;
3623
3624         /*
3625          * On some boards, not all available temperature sources are monitored,
3626          * even though some of the monitoring registers are unused.
3627          * Get list of unused monitoring registers, then detect if any fan
3628          * controls are configured to use unmonitored temperature sources.
3629          * If so, assign the unmonitored temperature sources to available
3630          * monitoring registers.
3631          */
3632         mask = 0;
3633         available = 0;
3634         for (i = 0; i < num_reg_temp; i++) {
3635                 if (reg_temp[i] == 0)
3636                         continue;
3637
3638                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3639                 if (!src || (mask & (1 << src)))
3640                         available |= 1 << i;
3641
3642                 mask |= 1 << src;
3643         }
3644
3645         /*
3646          * Now find unmonitored temperature registers and enable monitoring
3647          * if additional monitoring registers are available.
3648          */
3649         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3650         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3651
3652         mask = 0;
3653         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3654         for (i = 0; i < num_reg_temp; i++) {
3655                 if (reg_temp[i] == 0)
3656                         continue;
3657
3658                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3659                 if (!src || (mask & (1 << src)))
3660                         continue;
3661
3662                 if (src >= data->temp_label_num ||
3663                     !strlen(data->temp_label[src])) {
3664                         dev_info(dev,
3665                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3666                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3667                         continue;
3668                 }
3669
3670                 mask |= 1 << src;
3671
3672                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3673                 if (src <= data->temp_fixed_num) {
3674                         data->have_temp |= 1 << (src - 1);
3675                         data->have_temp_fixed |= 1 << (src - 1);
3676                         data->reg_temp[0][src - 1] = reg_temp[i];
3677                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3678                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3679                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3680                         data->temp_src[src - 1] = src;
3681                         continue;
3682                 }
3683
3684                 if (s >= NUM_TEMP)
3685                         continue;
3686
3687                 /* Use dynamic index for other sources */
3688                 data->have_temp |= 1 << s;
3689                 data->reg_temp[0][s] = reg_temp[i];
3690                 data->reg_temp[1][s] = reg_temp_over[i];
3691                 data->reg_temp[2][s] = reg_temp_hyst[i];
3692                 data->reg_temp_config[s] = reg_temp_config[i];
3693                 if (reg_temp_crit[src - 1])
3694                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3695
3696                 data->temp_src[s] = src;
3697                 s++;
3698         }
3699
3700 #ifdef USE_ALTERNATE
3701         /*
3702          * Go through the list of alternate temp registers and enable
3703          * if possible.
3704          * The temperature is already monitored if the respective bit in <mask>
3705          * is set.
3706          */
3707         for (i = 0; i < data->temp_label_num - 1; i++) {
3708                 if (!reg_temp_alternate[i])
3709                         continue;
3710                 if (mask & (1 << (i + 1)))
3711                         continue;
3712                 if (i < data->temp_fixed_num) {
3713                         if (data->have_temp & (1 << i))
3714                                 continue;
3715                         data->have_temp |= 1 << i;
3716                         data->have_temp_fixed |= 1 << i;
3717                         data->reg_temp[0][i] = reg_temp_alternate[i];
3718                         data->reg_temp[1][i] = reg_temp_over[i];
3719                         data->reg_temp[2][i] = reg_temp_hyst[i];
3720                         data->temp_src[i] = i + 1;
3721                         continue;
3722                 }
3723
3724                 if (s >= NUM_TEMP)      /* Abort if no more space */
3725                         break;
3726
3727                 data->have_temp |= 1 << s;
3728                 data->reg_temp[0][s] = reg_temp_alternate[i];
3729                 data->temp_src[s] = i + 1;
3730                 s++;
3731         }
3732 #endif /* USE_ALTERNATE */
3733
3734         switch (data->kind) {
3735         case nct6775:
3736                 break;
3737         case nct6776:
3738                 /*
3739                  * On NCT6776, AUXTIN and VIN3 pins are shared.
3740                  * Only way to detect it is to check if AUXTIN is used
3741                  * as a temperature source, and if that source is
3742                  * enabled.
3743                  *
3744                  * If that is the case, disable in6, which reports VIN3.
3745                  * Otherwise disable temp3.
3746                  */
3747                 if (data->have_temp & (1 << 2)) {
3748                         u8 reg = nct6775_read_value(data,
3749                                                     data->reg_temp_config[2]);
3750                         if (reg & 0x01)
3751                                 data->have_temp &= ~(1 << 2);
3752                         else
3753                                 data->have_in &= ~(1 << 6);
3754                 }
3755                 break;
3756         case nct6779:
3757                 /*
3758                  * Shared pins:
3759                  *      VIN4 / AUXTIN0
3760                  *      VIN5 / AUXTIN1
3761                  *      VIN6 / AUXTIN2
3762                  *      VIN7 / AUXTIN3
3763                  *
3764                  * There does not seem to be a clean way to detect if VINx or
3765                  * AUXTINx is active, so for keep both sensor types enabled
3766                  * for now.
3767                  */
3768                 break;
3769         }
3770
3771         /* Initialize the chip */
3772         nct6775_init_device(data);
3773
3774         err = superio_enter(sio_data->sioreg);
3775         if (err)
3776                 return err;
3777
3778         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3779         switch (data->kind) {
3780         case nct6775:
3781                 have_vid = (cr2a & 0x40);
3782                 break;
3783         case nct6776:
3784                 have_vid = (cr2a & 0x60) == 0x40;
3785                 break;
3786         case nct6779:
3787                 break;
3788         }
3789
3790         /*
3791          * Read VID value
3792          * We can get the VID input values directly at logical device D 0xe3.
3793          */
3794         if (have_vid) {
3795                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3796                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3797                 data->vrm = vid_which_vrm();
3798         }
3799
3800         if (fan_debounce) {
3801                 u8 tmp;
3802
3803                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3804                 tmp = superio_inb(sio_data->sioreg,
3805                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3806                 switch (data->kind) {
3807                 case nct6775:
3808                         tmp |= 0x1e;
3809                         break;
3810                 case nct6776:
3811                 case nct6779:
3812                         tmp |= 0x3e;
3813                         break;
3814                 }
3815                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3816                              tmp);
3817                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3818                          data->name);
3819         }
3820
3821         superio_exit(sio_data->sioreg);
3822
3823         if (have_vid) {
3824                 err = device_create_file(dev, &dev_attr_cpu0_vid);
3825                 if (err)
3826                         return err;
3827         }
3828
3829         err = nct6775_check_fan_inputs(sio_data, data);
3830         if (err)
3831                 goto exit_remove;
3832
3833         /* Read fan clock dividers immediately */
3834         nct6775_init_fan_common(dev, data);
3835
3836         /* Register sysfs hooks */
3837         for (i = 0; i < data->pwm_num; i++) {
3838                 if (!(data->has_pwm & (1 << i)))
3839                         continue;
3840
3841                 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3842                 if (err)
3843                         goto exit_remove;
3844
3845                 if (data->REG_PWM[3]) {
3846                         err = device_create_file(dev,
3847                                         &sda_pwm_max[i].dev_attr);
3848                         if (err)
3849                                 goto exit_remove;
3850                 }
3851                 if (data->REG_PWM[4]) {
3852                         err = device_create_file(dev,
3853                                         &sda_pwm_step[i].dev_attr);
3854                         if (err)
3855                                 goto exit_remove;
3856                 }
3857                 if (data->REG_PWM[6]) {
3858                         err = device_create_file(dev,
3859                                         &sda_weight_duty_base[i].dev_attr);
3860                         if (err)
3861                                 goto exit_remove;
3862                 }
3863         }
3864         for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3865                 struct sensor_device_attribute_2 *attr =
3866                         &sda_auto_pwm_arrays[i];
3867
3868                 if (!(data->has_pwm & (1 << attr->nr)))
3869                         continue;
3870                 if (attr->index > data->auto_pwm_num)
3871                         continue;
3872                 err = device_create_file(dev, &attr->dev_attr);
3873                 if (err)
3874                         goto exit_remove;
3875         }
3876
3877         for (i = 0; i < data->in_num; i++) {
3878                 if (!(data->have_in & (1 << i)))
3879                         continue;
3880                 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3881                 if (err)
3882                         goto exit_remove;
3883         }
3884
3885         for (i = 0; i < 5; i++) {
3886                 if (data->has_fan & (1 << i)) {
3887                         err = device_create_file(dev,
3888                                                  &sda_fan_input[i].dev_attr);
3889                         if (err)
3890                                 goto exit_remove;
3891                         err = device_create_file(dev,
3892                                                  &sda_fan_alarm[i].dev_attr);
3893                         if (err)
3894                                 goto exit_remove;
3895                         if (data->kind != nct6776 &&
3896                             data->kind != nct6779) {
3897                                 err = device_create_file(dev,
3898                                                 &sda_fan_div[i].dev_attr);
3899                                 if (err)
3900                                         goto exit_remove;
3901                         }
3902                         if (data->has_fan_min & (1 << i)) {
3903                                 err = device_create_file(dev,
3904                                                 &sda_fan_min[i].dev_attr);
3905                                 if (err)
3906                                         goto exit_remove;
3907                         }
3908                         err = device_create_file(dev,
3909                                                 &sda_fan_pulses[i].dev_attr);
3910                         if (err)
3911                                 goto exit_remove;
3912                 }
3913         }
3914
3915         for (i = 0; i < NUM_TEMP; i++) {
3916                 if (!(data->have_temp & (1 << i)))
3917                         continue;
3918                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3919                 if (err)
3920                         goto exit_remove;
3921                 if (data->temp_label) {
3922                         err = device_create_file(dev,
3923                                                  &sda_temp_label[i].dev_attr);
3924                         if (err)
3925                                 goto exit_remove;
3926                 }
3927                 if (data->reg_temp[1][i]) {
3928                         err = device_create_file(dev,
3929                                                  &sda_temp_max[i].dev_attr);
3930                         if (err)
3931                                 goto exit_remove;
3932                 }
3933                 if (data->reg_temp[2][i]) {
3934                         err = device_create_file(dev,
3935                                         &sda_temp_max_hyst[i].dev_attr);
3936                         if (err)
3937                                 goto exit_remove;
3938                 }
3939                 if (data->reg_temp[3][i]) {
3940                         err = device_create_file(dev,
3941                                                  &sda_temp_crit[i].dev_attr);
3942                         if (err)
3943                                 goto exit_remove;
3944                 }
3945                 if (!(data->have_temp_fixed & (1 << i)))
3946                         continue;
3947                 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3948                 if (err)
3949                         goto exit_remove;
3950                 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3951                 if (err)
3952                         goto exit_remove;
3953                 if (i >= NUM_TEMP_ALARM ||
3954                     data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3955                         continue;
3956                 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3957                 if (err)
3958                         goto exit_remove;
3959         }
3960
3961         for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3962                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3963                         continue;
3964                 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3965                 if (err)
3966                         goto exit_remove;
3967         }
3968
3969         err = device_create_file(dev, &dev_attr_name);
3970         if (err)
3971                 goto exit_remove;
3972
3973         data->hwmon_dev = hwmon_device_register(dev);
3974         if (IS_ERR(data->hwmon_dev)) {
3975                 err = PTR_ERR(data->hwmon_dev);
3976                 goto exit_remove;
3977         }
3978
3979         return 0;
3980
3981 exit_remove:
3982         nct6775_device_remove_files(dev);
3983         return err;
3984 }
3985
3986 static int nct6775_remove(struct platform_device *pdev)
3987 {
3988         struct nct6775_data *data = platform_get_drvdata(pdev);
3989
3990         hwmon_device_unregister(data->hwmon_dev);
3991         nct6775_device_remove_files(&pdev->dev);
3992
3993         return 0;
3994 }
3995
3996 #ifdef CONFIG_PM
3997 static int nct6775_suspend(struct device *dev)
3998 {
3999         struct nct6775_data *data = nct6775_update_device(dev);
4000         struct nct6775_sio_data *sio_data = dev->platform_data;
4001
4002         mutex_lock(&data->update_lock);
4003         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4004         if (sio_data->kind == nct6775) {
4005                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4006                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4007         }
4008         mutex_unlock(&data->update_lock);
4009
4010         return 0;
4011 }
4012
4013 static int nct6775_resume(struct device *dev)
4014 {
4015         struct nct6775_data *data = dev_get_drvdata(dev);
4016         struct nct6775_sio_data *sio_data = dev->platform_data;
4017         int i, j;
4018
4019         mutex_lock(&data->update_lock);
4020         data->bank = 0xff;              /* Force initial bank selection */
4021
4022         /* Restore limits */
4023         for (i = 0; i < data->in_num; i++) {
4024                 if (!(data->have_in & (1 << i)))
4025                         continue;
4026
4027                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4028                                     data->in[i][1]);
4029                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4030                                     data->in[i][2]);
4031         }
4032
4033         for (i = 0; i < 5; i++) {
4034                 if (!(data->has_fan_min & (1 << i)))
4035                         continue;
4036
4037                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4038                                     data->fan_min[i]);
4039         }
4040
4041         for (i = 0; i < NUM_TEMP; i++) {
4042                 if (!(data->have_temp & (1 << i)))
4043                         continue;
4044
4045                 for (j = 1; j < 4; j++)
4046                         if (data->reg_temp[j][i])
4047                                 nct6775_write_temp(data, data->reg_temp[j][i],
4048                                                    data->temp[j][i]);
4049         }
4050
4051         /* Restore other settings */
4052         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4053         if (sio_data->kind == nct6775) {
4054                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4055                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4056         }
4057
4058         /* Force re-reading all values */
4059         data->valid = false;
4060         mutex_unlock(&data->update_lock);
4061
4062         return 0;
4063 }
4064
4065 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4066         .suspend = nct6775_suspend,
4067         .resume = nct6775_resume,
4068 };
4069
4070 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
4071 #else
4072 #define NCT6775_DEV_PM_OPS      NULL
4073 #endif /* CONFIG_PM */
4074
4075 static struct platform_driver nct6775_driver = {
4076         .driver = {
4077                 .owner  = THIS_MODULE,
4078                 .name   = DRVNAME,
4079                 .pm     = NCT6775_DEV_PM_OPS,
4080         },
4081         .probe          = nct6775_probe,
4082         .remove         = nct6775_remove,
4083 };
4084
4085 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4086 static int __init nct6775_find(int sioaddr, unsigned short *addr,
4087                                struct nct6775_sio_data *sio_data)
4088 {
4089         static const char sio_name_NCT6775[] __initconst = "NCT6775F";
4090         static const char sio_name_NCT6776[] __initconst = "NCT6776F";
4091         static const char sio_name_NCT6779[] __initconst = "NCT6779D";
4092
4093         u16 val;
4094         const char *sio_name;
4095         int err;
4096
4097         err = superio_enter(sioaddr);
4098         if (err)
4099                 return err;
4100
4101         if (force_id)
4102                 val = force_id;
4103         else
4104                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4105                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4106         switch (val & SIO_ID_MASK) {
4107         case SIO_NCT6775_ID:
4108                 sio_data->kind = nct6775;
4109                 sio_name = sio_name_NCT6775;
4110                 break;
4111         case SIO_NCT6776_ID:
4112                 sio_data->kind = nct6776;
4113                 sio_name = sio_name_NCT6776;
4114                 break;
4115         case SIO_NCT6779_ID:
4116                 sio_data->kind = nct6779;
4117                 sio_name = sio_name_NCT6779;
4118                 break;
4119         default:
4120                 if (val != 0xffff)
4121                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4122                 superio_exit(sioaddr);
4123                 return -ENODEV;
4124         }
4125
4126         /* We have a known chip, find the HWM I/O address */
4127         superio_select(sioaddr, NCT6775_LD_HWM);
4128         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4129             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4130         *addr = val & IOREGION_ALIGNMENT;
4131         if (*addr == 0) {
4132                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4133                 superio_exit(sioaddr);
4134                 return -ENODEV;
4135         }
4136
4137         /* Activate logical device if needed */
4138         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4139         if (!(val & 0x01)) {
4140                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4141                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4142         }
4143
4144         superio_exit(sioaddr);
4145         pr_info("Found %s chip at %#x\n", sio_name, *addr);
4146         sio_data->sioreg = sioaddr;
4147
4148         return 0;
4149 }
4150
4151 /*
4152  * when Super-I/O functions move to a separate file, the Super-I/O
4153  * bus will manage the lifetime of the device and this module will only keep
4154  * track of the nct6775 driver. But since we platform_device_alloc(), we
4155  * must keep track of the device
4156  */
4157 static struct platform_device *pdev;
4158
4159 static int __init sensors_nct6775_init(void)
4160 {
4161         int err;
4162         unsigned short address;
4163         struct resource res;
4164         struct nct6775_sio_data sio_data;
4165
4166         /*
4167          * initialize sio_data->kind and sio_data->sioreg.
4168          *
4169          * when Super-I/O functions move to a separate file, the Super-I/O
4170          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4171          * nct6775 hardware monitor, and call probe()
4172          */
4173         if (nct6775_find(0x2e, &address, &sio_data) &&
4174             nct6775_find(0x4e, &address, &sio_data))
4175                 return -ENODEV;
4176
4177         err = platform_driver_register(&nct6775_driver);
4178         if (err)
4179                 goto exit;
4180
4181         pdev = platform_device_alloc(DRVNAME, address);
4182         if (!pdev) {
4183                 err = -ENOMEM;
4184                 pr_err("Device allocation failed\n");
4185                 goto exit_unregister;
4186         }
4187
4188         err = platform_device_add_data(pdev, &sio_data,
4189                                        sizeof(struct nct6775_sio_data));
4190         if (err) {
4191                 pr_err("Platform data allocation failed\n");
4192                 goto exit_device_put;
4193         }
4194
4195         memset(&res, 0, sizeof(res));
4196         res.name = DRVNAME;
4197         res.start = address + IOREGION_OFFSET;
4198         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4199         res.flags = IORESOURCE_IO;
4200
4201         err = acpi_check_resource_conflict(&res);
4202         if (err)
4203                 goto exit_device_put;
4204
4205         err = platform_device_add_resources(pdev, &res, 1);
4206         if (err) {
4207                 pr_err("Device resource addition failed (%d)\n", err);
4208                 goto exit_device_put;
4209         }
4210
4211         /* platform_device_add calls probe() */
4212         err = platform_device_add(pdev);
4213         if (err) {
4214                 pr_err("Device addition failed (%d)\n", err);
4215                 goto exit_device_put;
4216         }
4217
4218         return 0;
4219
4220 exit_device_put:
4221         platform_device_put(pdev);
4222 exit_unregister:
4223         platform_driver_unregister(&nct6775_driver);
4224 exit:
4225         return err;
4226 }
4227
4228 static void __exit sensors_nct6775_exit(void)
4229 {
4230         platform_device_unregister(pdev);
4231         platform_driver_unregister(&nct6775_driver);
4232 }
4233
4234 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4235 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4236 MODULE_LICENSE("GPL");
4237
4238 module_init(sensors_nct6775_init);
4239 module_exit(sensors_nct6775_exit);