#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
#define SPI_FLASH_CFI_MFR_WINBOND 0xef
-/* SECT flags */
-#define SECT_4K (1 << 1)
-#define SECT_32K (1 << 2)
-#define E_FSR (1 << 3)
-
/* Erase commands */
#define CMD_ERASE_4K 0x20
#define CMD_ERASE_32K 0x52
#endif
/* Common status */
-#define STATUS_WIP 0x01
+#define STATUS_WIP (1 << 0)
#define STATUS_QEB_WINSPAN (1 << 1)
#define STATUS_QEB_MXIC (1 << 6)
-#define STATUS_PEC 0x80
+#define STATUS_PEC (1 << 7)
/* Flash timeout values */
#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
/* Program the status register */
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
/* Read the config register */
int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
return 0;
}
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
{
u8 cmd;
int ret;
cmd = CMD_WRITE_STATUS;
- ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1);
+ ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
if (ret < 0) {
debug("SF: fail to write status register\n");
return ret;
spi_flash_addr(offset, cmd);
- debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
+ debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
cmd = spi_read_cmds_array[cmd - 1];
flash->read_cmd = cmd;
} else {
- /* Go for for default supported read cmd */
+ /* Go for default supported read cmd */
flash->read_cmd = CMD_READ_ARRAY_FAST;
}
flash->dummy_byte = 1;
}
- /* Poll cmd seclection */
+ /* Poll cmd selection */
flash->poll_cmd = CMD_READ_STATUS;
#ifdef CONFIG_SPI_FLASH_STMICRO
if (params->flags & E_FSR)
#include <linux/types.h>
#include <linux/compiler.h>
-/* No enum list for write commands only QPP */
+/* sf param flags */
+#define SECT_4K 1 << 1
+#define SECT_32K 1 << 2
+#define E_FSR 1 << 3
#define WR_QPP 1 << 4
/* Enum list - Full read commands */