Initial support for PXs3 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
select OF_BOARD_SETUP
default y
+config ARCH_UNIPHIER_PXS3
+ bool "Enable UniPhier PXs3 SoC support"
+ depends on ARCH_UNIPHIER_V8_MULTI
+ default y
+
config CACHE_UNIPHIER
bool "Enable the UniPhier L2 cache controller"
depends on ARCH_UNIPHIER_32BIT
.misc_init = uniphier_ld20_misc_init,
},
#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
+ {
+ .soc_id = UNIPHIER_PXS3_ID,
+ .nand_2cs = false,
+ .sbc_init = uniphier_pxs2_sbc_init,
+ .pll_init = uniphier_pxs3_pll_init,
+ },
+#endif
};
UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += pll-pxs3.o
endif
--- /dev/null
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+void uniphier_pxs3_pll_init(void)
+{
+}
case UNIPHIER_LD20_ID:
puts("LD20 (SC1401AJ1)");
break;
+ case UNIPHIER_PXS3_ID:
+ puts("PXs3");
+ break;
default:
printf("Unknown Processor ID (0x%x)\n", id);
return -ENOTSUPP;
void uniphier_pro4_pll_init(void);
void uniphier_ld11_pll_init(void);
void uniphier_ld20_pll_init(void);
+void uniphier_pxs3_pll_init(void);
void uniphier_ld4_clk_init(void);
void uniphier_pro4_clk_init(void);
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-ld11.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += sbc-pxs2.o
#define UNIPHIER_LD6B_ID 0x2f
#define UNIPHIER_LD11_ID 0x31
#define UNIPHIER_LD20_ID 0x32
+#define UNIPHIER_PXS3_ID 0x35
unsigned int uniphier_get_soc_id(void);
unsigned int uniphier_get_soc_model(void);
$ make uniphier_ld20_defconfig
$ make CROSS_COMPILE=aarch64-linux-gnu-
+PXs3 reference board:
+ $ make uniphier_v8_defconfig
+ $ make CROSS_COMPILE=aarch64-linux-gnu- DEVICE_TREE=uniphier-pxs3-ref
+
You may wish to change the "CROSS_COMPILE=..." to use your favorite compiler.