]> git.sur5r.net Git - u-boot/commitdiff
Merge branch 'master' of git://git.denx.de/u-boot into resolve
authorMinkyu Kang <mk7.kang@samsung.com>
Mon, 10 Dec 2012 04:44:41 +0000 (13:44 +0900)
committerMinkyu Kang <mk7.kang@samsung.com>
Mon, 10 Dec 2012 05:13:27 +0000 (14:13 +0900)
Conflicts:
README
board/samsung/universal_c210/universal.c
drivers/misc/Makefile
drivers/power/power_fsl.c
include/configs/mx35pdk.h
include/configs/mx53loco.h
include/configs/seaboard.h

33 files changed:
1  2 
MAINTAINERS
Makefile
board/freescale/mx35pdk/mx35pdk.c
board/samsung/trats/trats.c
board/samsung/universal_c210/universal.c
boards.cfg
common/Makefile
common/lcd.c
common/main.c
drivers/mmc/tegra_mmc.c
drivers/power/power_fsl.c
drivers/video/Makefile
include/configs/mx31pdk.h
include/configs/mx35pdk.h
include/configs/mx51_efikamx.h
include/configs/mx51evk.h
include/configs/mx53evk.h
include/configs/mx53loco.h
include/configs/mx6qarm2.h
include/configs/mx6qsabre_common.h
include/configs/mx6qsabrelite.h
include/configs/s5pc210_universal.h
include/configs/seaboard.h
include/configs/tegra-common-post.h
include/configs/tegra20-common.h
include/configs/trats.h
include/configs/ventana.h
include/configs/vision2.h
include/fdtdec.h
include/lcd.h
include/power/max8998_pmic.h
lib/fdtdec.c
spl/Makefile

diff --cc MAINTAINERS
Simple merge
diff --cc Makefile
Simple merge
Simple merge
Simple merge
index afe3bb0aeb81eb38a0e1dad8c5d06770eab0cc2b,36a047217c57cbdac1b07196fbb137bf0eb7f2d1..3d508bea2374f2a3a557c8ebb4ea98d1d0abc905
  #include <asm/arch/adc.h>
  #include <asm/arch/gpio.h>
  #include <asm/arch/mmc.h>
- #include <pmic.h>
- #include <usb/s3c_udc.h>
- #include <asm/arch/cpu.h>
- #include <max8998_pmic.h>
 +#include <asm/arch/pinmux.h>
 +#include <asm/arch/watchdog.h>
 +#include <libtizen.h>
 +#include <ld9040.h>
+ #include <power/pmic.h>
+ #include <usb/s3c_udc.h>
+ #include <asm/arch/cpu.h>
+ #include <power/max8998_pmic.h>
  
  DECLARE_GLOBAL_DATA_PTR;
  
@@@ -55,7 -48,32 +55,16 @@@ static int get_hwrev(void
        return board_rev & 0xFF;
  }
  
--static void check_hw_revision(void);
 -
 -int board_init(void)
 -{
 -      gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
 -      gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
 -
 -      gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
 -      gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 -
 -      check_hw_revision();
 -      printf("HW Revision:\t0x%x\n", board_rev);
 -
 -      return 0;
 -}
 -
+ int power_init_board(void)
+ {
+       int ret;
+       ret = pmic_init(I2C_5);
+       if (ret)
+               return ret;
+       return 0;
+ }
  
  int dram_init(void)
  {
@@@ -264,240 -331,3 +277,236 @@@ struct s3c_plat_otg_data s5pc210_otg_da
        .usb_flags = PHY0_SLEEP,
  };
  #endif
- #if defined(CONFIG_PMIC)
-       pmic_init();
-       init_pmic_lcd();
- #endif
 +
 +int board_early_init_f(void)
 +{
 +      wdt_stop();
 +
 +      return 0;
 +}
 +
 +#ifdef CONFIG_SOFT_SPI
 +static void soft_spi_init(void)
 +{
 +      gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
 +              CONFIG_SOFT_SPI_MODE & SPI_CPOL);
 +      gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
 +      gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
 +      gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
 +              !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
 +}
 +
 +void spi_cs_activate(struct spi_slave *slave)
 +{
 +      gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
 +              !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
 +      SPI_SCL(1);
 +      gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
 +              CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
 +}
 +
 +void spi_cs_deactivate(struct spi_slave *slave)
 +{
 +      gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
 +              !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
 +}
 +
 +int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
 +{
 +      return bus == 0 && cs == 0;
 +}
 +
 +void universal_spi_scl(int bit)
 +{
 +      gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
 +}
 +
 +void universal_spi_sda(int bit)
 +{
 +      gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
 +}
 +
 +int universal_spi_read(void)
 +{
 +      return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
 +}
 +#endif
 +
 +static void init_pmic_lcd(void)
 +{
 +      unsigned char val;
 +      int ret = 0;
 +
 +      struct pmic *p = get_pmic();
 +
 +      if (pmic_probe(p))
 +              return;
 +
 +      /* LDO7 1.8V */
 +      val = 0x02; /* (1800 - 1600) / 100; */
 +      ret |= pmic_reg_write(p,  MAX8998_REG_LDO7, val);
 +
 +      /* LDO17 3.0V */
 +      val = 0xe; /* (3000 - 1600) / 100; */
 +      ret |= pmic_reg_write(p,  MAX8998_REG_LDO17, val);
 +
 +      /* Disable unneeded regulators */
 +      /*
 +       * ONOFF1
 +       * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
 +       * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
 +       */
 +      val = 0xB9;
 +      ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF1, val);
 +
 +      /* ONOFF2
 +       * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
 +       * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
 +       */
 +      val = 0x50;
 +      ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF2, val);
 +
 +      /* ONOFF3
 +       * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
 +       * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
 +       */
 +      val = 0x00;
 +      ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF3, val);
 +
 +      if (ret)
 +              puts("LCD pmic initialisation error!\n");
 +}
 +
 +static void lcd_cfg_gpio(void)
 +{
 +      unsigned int i, f3_end = 4;
 +
 +      for (i = 0; i < 8; i++) {
 +              /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
 +              s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
 +              s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
 +              s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
 +              /* pull-up/down disable */
 +              s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
 +              s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
 +              s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
 +
 +              /* drive strength to max (24bit) */
 +              s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
 +              s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
 +              s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
 +              s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
 +              s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
 +              s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
 +      }
 +
 +      for (i = 0; i < f3_end; i++) {
 +              /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
 +              s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
 +              /* pull-up/down disable */
 +              s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
 +              /* drive strength to max (24bit) */
 +              s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
 +              s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
 +      }
 +
 +      /* gpio pad configuration for LCD reset. */
 +      s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
 +
 +      spi_init();
 +}
 +
 +static void reset_lcd(void)
 +{
 +      s5p_gpio_set_value(&gpio2->y4, 5, 1);
 +      udelay(10000);
 +      s5p_gpio_set_value(&gpio2->y4, 5, 0);
 +      udelay(10000);
 +      s5p_gpio_set_value(&gpio2->y4, 5, 1);
 +      udelay(100);
 +}
 +
 +static void lcd_power_on(void)
 +{
 +      struct pmic *p = get_pmic();
 +
 +      if (pmic_probe(p))
 +              return;
 +
 +      pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
 +      pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
 +}
 +
 +vidinfo_t panel_info = {
 +      .vl_freq        = 60,
 +      .vl_col         = 480,
 +      .vl_row         = 800,
 +      .vl_width       = 480,
 +      .vl_height      = 800,
 +      .vl_clkp        = CONFIG_SYS_HIGH,
 +      .vl_hsp         = CONFIG_SYS_HIGH,
 +      .vl_vsp         = CONFIG_SYS_HIGH,
 +      .vl_dp          = CONFIG_SYS_HIGH,
 +
 +      .vl_bpix        = 5,    /* Bits per pixel */
 +
 +      /* LD9040 LCD Panel */
 +      .vl_hspw        = 2,
 +      .vl_hbpd        = 16,
 +      .vl_hfpd        = 16,
 +
 +      .vl_vspw        = 2,
 +      .vl_vbpd        = 8,
 +      .vl_vfpd        = 8,
 +      .vl_cmd_allow_len = 0xf,
 +
 +      .win_id         = 0,
 +      .cfg_gpio       = lcd_cfg_gpio,
 +      .backlight_on   = NULL,
 +      .lcd_power_on   = lcd_power_on,
 +      .reset_lcd      = reset_lcd,
 +      .dual_lcd_enabled = 0,
 +
 +      .init_delay     = 0,
 +      .power_on_delay = 10000,
 +      .reset_delay    = 10000,
 +      .interface_mode = FIMD_RGB_INTERFACE,
 +      .mipi_enabled   = 0,
 +};
 +
 +void init_panel_info(vidinfo_t *vid)
 +{
 +      vid->logo_on    = 1;
 +      vid->resolution = HD_RESOLUTION;
 +      vid->rgb_mode   = MODE_RGB_P;
 +
 +#ifdef CONFIG_TIZEN
 +      get_tizen_logo_info(vid);
 +#endif
 +
 +      /* for LD9040. */
 +      vid->pclk_name = 1;     /* MPLL */
 +      vid->sclk_div = 1;
 +
 +      vid->cfg_ldo = ld9040_cfg_ldo;
 +      vid->enable_ldo = ld9040_enable_ldo;
 +
 +      setenv("lcdinfo", "lcd=ld9040");
 +}
 +
 +int board_init(void)
 +{
 +      gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
 +      gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
 +
 +      gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
 +      gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 +
 +#ifdef CONFIG_SOFT_SPI
 +      soft_spi_init();
 +#endif
 +      check_hw_revision();
 +      printf("HW Revision:\t0x%x\n", board_rev);
 +
 +      return 0;
 +}
diff --cc boards.cfg
Simple merge
diff --cc common/Makefile
Simple merge
diff --cc common/lcd.c
Simple merge
diff --cc common/main.c
Simple merge
Simple merge
index 0000000000000000000000000000000000000000,651f88f850a0690bc26f15693051ddfee31e16f2..a663831589fdfe05a5756c592cd4ae5fcfc0fd6e
mode 000000,100644..100644
--- /dev/null
@@@ -1,0 -1,69 +1,75 @@@
 -      p->hw.i2c.tx_num = 3;
+ /*
+  *  Copyright (C) 2011 Samsung Electronics
+  *  Lukasz Majewski <l.majewski@samsung.com>
+  *
+  * See file CREDITS for list of people who contributed to this
+  * project.
+  *
+  * This program is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU General Public License as
+  * published by the Free Software Foundation; either version 2 of
+  * the License, or (at your option) any later version.
+  *
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+  * GNU General Public License for more details.
+  *
+  * You should have received a copy of the GNU General Public License
+  * along with this program; if not, write to the Free Software
+  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+  * MA 02111-1307 USA
+  */
+ #include <common.h>
+ #include <spi.h>
+ #include <power/pmic.h>
+ #include <fsl_pmic.h>
+ #include <errno.h>
++#if defined(CONFIG_PMIC_FSL_MC13892)
++#define FSL_PMIC_I2C_LENGTH   3
++#elif defined(CONFIG_PMIC_FSL_MC34704)
++#define FSL_PMIC_I2C_LENGTH   1
++#endif
++
+ #if defined(CONFIG_POWER_SPI)
+ static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)
+ {
+       return (write << 31) | (reg << 25) | (*val & 0x00FFFFFF);
+ }
+ #endif
+ int pmic_init(unsigned char bus)
+ {
+       static const char name[] = "FSL_PMIC";
+       struct pmic *p = pmic_alloc();
+       if (!p) {
+               printf("%s: POWER allocation error!\n", __func__);
+               return -ENOMEM;
+       }
+       p->name = name;
+       p->number_of_regs = PMIC_NUM_OF_REGS;
+ #if defined(CONFIG_POWER_SPI)
+       p->interface = PMIC_SPI;
+       p->bus = CONFIG_FSL_PMIC_BUS;
+       p->hw.spi.cs = CONFIG_FSL_PMIC_CS;
+       p->hw.spi.clk = CONFIG_FSL_PMIC_CLK;
+       p->hw.spi.mode = CONFIG_FSL_PMIC_MODE;
+       p->hw.spi.bitlen = CONFIG_FSL_PMIC_BITLEN;
+       p->hw.spi.flags = SPI_XFER_BEGIN | SPI_XFER_END;
+       p->hw.spi.prepare_tx = pmic_spi_prepare_tx;
+ #elif defined(CONFIG_POWER_I2C)
+       p->interface = PMIC_I2C;
+       p->hw.i2c.addr = CONFIG_SYS_FSL_PMIC_I2C_ADDR;
++      p->hw.i2c.tx_num = FSL_PMIC_I2C_LENGTH;
+       p->bus = bus;
+ #else
+ #error "You must select CONFIG_POWER_SPI or CONFIG_PMIC_I2C"
+ #endif
+       return 0;
+ }
index b3207c83c3cfc3089c4cbe8fa359f864b29e797c,cc3022a2c73a9e8c6578b8ac99951ae50976633a..170a358b5283849207827f21d7eb49dc419d9acf
@@@ -37,9 -37,9 +37,10 @@@ COBJS-$(CONFIG_EXYNOS_PWM_BL) += exynos
  COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
  COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o
  COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
 +COBJS-$(CONFIG_LD9040) += ld9040.o
  COBJS-$(CONFIG_SED156X) += sed156x.o
  COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
+ COBJS-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
  COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
  COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
  COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
Simple merge
index 1c2f5993d8c1f46555a0ccea43d2b081126056c0,342d53fee0b9363901161353496669ded74aa30c..88b2bd6ed4407a76c720c8eb03af539e41460388
  /*
   * PMIC Configs
   */
- #define CONFIG_PMIC
- #define CONFIG_PMIC_I2C
- #define CONFIG_PMIC_FSL
+ #define CONFIG_POWER
+ #define CONFIG_POWER_I2C
+ #define CONFIG_POWER_FSL
 +#define CONFIG_PMIC_FSL_MC13892
  #define CONFIG_SYS_FSL_PMIC_I2C_ADDR  0x08
  #define CONFIG_RTC_MC13XXX
  
Simple merge
Simple merge
index c472075c9adcf9189b85efe02360b0f670b41c44,1916b85e2837f06760cf32cf03a310d549e54aed..a0af3eeb26f2783b64b6eca380e0c6894170be77
  #define CONFIG_SYS_I2C_SPEED            100000
  
  /* PMIC Configs */
- #define CONFIG_PMIC
- #define CONFIG_PMIC_I2C
- #define CONFIG_PMIC_FSL
+ #define CONFIG_POWER
+ #define CONFIG_POWER_I2C
+ #define CONFIG_POWER_FSL
  #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    8
 +#define CONFIG_PMIC_FSL_MC13892
  #define CONFIG_RTC_MC13XXX
  
  /* MMC Configs */
index 37f9d69e2609d5afe2154207acbd0363d4716421,a1101762e382624d9a73dcb283a93b25be8f2ea2..e30502b4e216a176f1d1f085e92ebae196151a68
  #define CONFIG_SYS_I2C_SPEED          100000
  
  /* PMIC Controller */
- #define CONFIG_PMIC
- #define CONFIG_PMIC_I2C
- #define CONFIG_DIALOG_PMIC
- #define CONFIG_PMIC_FSL
+ #define CONFIG_POWER
+ #define CONFIG_POWER_I2C
+ #define CONFIG_DIALOG_POWER
+ #define CONFIG_POWER_FSL
 +#define CONFIG_PMIC_FSL_MC13892
  #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR       0x48
  #define CONFIG_SYS_FSL_PMIC_I2C_ADDR  0x8
  
Simple merge
Simple merge
Simple merge
Simple merge
index c2d1c66215f3ffa3d563af6f5a740e143cbcc548,ab10bd0abc7e57a24e2115eb3fd3698899016dd6..94116f116a53f925c78fcbb7fd37e19a45e1816e
  #define CONFIG_TEGRA_KEYBOARD
  #define CONFIG_KEYBOARD
  
 -#include "tegra-common-post.h"
+ /* USB keyboard */
+ #define CONFIG_USB_KEYBOARD
 +#undef TEGRA_DEVICE_SETTINGS
 +#define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \
 +                              "stdout=serial,lcd\0" \
 +                              "stderr=serial,lcd\0"
 +
 +/* LCD support */
 +#define CONFIG_LCD
 +#define CONFIG_PWM_TEGRA
 +#define CONFIG_VIDEO_TEGRA
 +#define LCD_BPP                               LCD_COLOR16
 +#define CONFIG_SYS_WHITE_ON_BLACK
 +#define CONFIG_CONSOLE_SCROLL_LINES   10
  
  /* NAND support */
  #define CONFIG_CMD_NAND
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Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
diff --cc include/lcd.h
Simple merge
index 0000000000000000000000000000000000000000,ca21f882c29344aae475cc967fc55255619ad3fe..0e559f986aa92257e4aea2392c357c36c4e023cc
mode 000000,100644..100644
--- /dev/null
@@@ -1,0 -1,86 +1,88 @@@
+ /*
+  *  Copyright (C) 2011 Samsung Electronics
+  *  Lukasz Majewski <l.majewski@samsung.com>
+  *
+  * See file CREDITS for list of people who contributed to this
+  * project.
+  *
+  * This program is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU General Public License as
+  * published by the Free Software Foundation; either version 2 of
+  * the License, or (at your option) any later version.
+  *
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+  * GNU General Public License for more details.
+  *
+  * You should have received a copy of the GNU General Public License
+  * along with this program; if not, write to the Free Software
+  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+  * MA 02111-1307 USA
+  */
+ #ifndef __MAX8998_PMIC_H_
+ #define __MAX8998_PMIC_H_
+ /* MAX 8998 registers */
+ enum {
+       MAX8998_REG_IRQ1,
+       MAX8998_REG_IRQ2,
+       MAX8998_REG_IRQ3,
+       MAX8998_REG_IRQ4,
+       MAX8998_REG_IRQM1,
+       MAX8998_REG_IRQM2,
+       MAX8998_REG_IRQM3,
+       MAX8998_REG_IRQM4,
+       MAX8998_REG_STATUS1,
+       MAX8998_REG_STATUS2,
+       MAX8998_REG_STATUSM1,
+       MAX8998_REG_STATUSM2,
+       MAX8998_REG_CHGR1,
+       MAX8998_REG_CHGR2,
+       MAX8998_REG_LDO_ACTIVE_DISCHARGE1,
+       MAX8998_REG_LDO_ACTIVE_DISCHARGE2,
+       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
+       MAX8998_REG_ONOFF1,
+       MAX8998_REG_ONOFF2,
+       MAX8998_REG_ONOFF3,
+       MAX8998_REG_ONOFF4,
+       MAX8998_REG_BUCK1_VOLTAGE1,
+       MAX8998_REG_BUCK1_VOLTAGE2,
+       MAX8998_REG_BUCK1_VOLTAGE3,
+       MAX8998_REG_BUCK1_VOLTAGE4,
+       MAX8998_REG_BUCK2_VOLTAGE1,
+       MAX8998_REG_BUCK2_VOLTAGE2,
+       MAX8998_REG_BUCK3,
+       MAX8998_REG_BUCK4,
+       MAX8998_REG_LDO2_LDO3,
+       MAX8998_REG_LDO4,
+       MAX8998_REG_LDO5,
+       MAX8998_REG_LDO6,
+       MAX8998_REG_LDO7,
+       MAX8998_REG_LDO8_LDO9,
+       MAX8998_REG_LDO10_LDO11,
+       MAX8998_REG_LDO12,
+       MAX8998_REG_LDO13,
+       MAX8998_REG_LDO14,
+       MAX8998_REG_LDO15,
+       MAX8998_REG_LDO16,
+       MAX8998_REG_LDO17,
+       MAX8998_REG_BKCHR,
+       MAX8998_REG_LBCNFG1,
+       MAX8998_REG_LBCNFG2,
+       PMIC_NUM_OF_REGS,
+ };
+ #define MAX8998_LDO3          (1 << 2)
+ #define MAX8998_LDO4          (1 << 1)
++#define MAX8998_LDO7          (1 << 6)
+ #define MAX8998_LDO8          (1 << 5)
++#define MAX8998_LDO17         (1 << 4)
+ #define MAX8998_SAFEOUT1      (1 << 4)
+ #define MAX8998_I2C_ADDR        (0xCC >> 1)
+ enum { LDO_OFF, LDO_ON };
+ #endif /* __MAX8998_PMIC_H_ */
diff --cc lib/fdtdec.c
Simple merge
diff --cc spl/Makefile
Simple merge