85xx: Convert all fsl_pci_init users to new APIs

Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>

diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index 2ef19ce696467d0edff6dab1e5738a0e9b7b551b..7b7a968a71544700578b7b536bc35d3c69e2e939 100644 (file)
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -182,6 +182,9 @@ static struct pci_controller pcie1_hose;
 
 int first_free_busno=0;
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 void
 pci_init_board(void)
 {
@@ -211,10 +214,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
  {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep = (host_agent == 5);
        int pcie_configured  = io_sel & 6;
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE1 connected to slot as %s (base address %x)",
@@ -227,36 +230,31 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_IO_BASE,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE1_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE2,
                               CONFIG_SYS_PCIE1_MEM_PHYS2,
                               CONFIG_SYS_PCIE1_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
 
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -279,8 +277,8 @@ pci_init_board(void)
 #ifdef CONFIG_PCI1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
+       struct pci_region *r = hose->regions;
 
        uint pci_agent = (host_agent == 6);
        uint pci_speed = 33333000; /*get_clock_freq (); PCI PSPEED in [4:5] */
@@ -300,26 +298,22 @@ pci_init_board(void)
                        );
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_MEM_BASE,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_IO_BASE,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -340,26 +334,23 @@ pci_init_board(void)
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI2_ADDR;
        extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci2_hose;
+       struct pci_region *r = hose->regions;
 
        if (!(devdisr & MPC85xx_DEVDISR_PCI2)) {
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI2_MEM_BASE,
                               CONFIG_SYS_PCI2_MEM_PHYS,
                               CONFIG_SYS_PCI2_MEM_SIZE,
                               PCI_REGION_MEM);
 
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI2_IO_BASE,
                               CONFIG_SYS_PCI2_IO_PHYS,
                               CONFIG_SYS_PCI2_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -385,39 +376,21 @@ int last_stage_init(void)
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
 
-void
-ft_board_setup(void *blob, bd_t *bd)
+void ft_board_setup(void *blob, bd_t *bd)
 {
-       int node, tmp[2];
-       const char *path;
-
        ft_cpu_setup(blob, bd);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #ifdef CONFIG_PCI1
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCI2
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pci2_hose.last_busno - pci2_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pci2_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci2", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
 #endif
-       }
 }
 #endif

diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index f357826fd055187b6a4ac05cb50a8fc5369bb086..2978b7d77a2283e28cf1ed74ea36adb77afefba2 100644 (file)
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -155,6 +155,9 @@ static struct pci_controller pcie2_hose;
 static struct pci_controller pcie3_hose;
 #endif
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 int first_free_busno=0;
 
 void
@@ -181,10 +184,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE3
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie3_hose;
        int pcie_ep = (host_agent == 1);
        int pcie_configured  = (io_sel == 7);
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE3 connected to Slot3 as %s (base address %x)",
@@ -197,27 +200,23 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE3_MEM_BASE,
                               CONFIG_SYS_PCIE3_MEM_PHYS,
                               CONFIG_SYS_PCIE3_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE3_IO_BASE,
                               CONFIG_SYS_PCIE3_IO_PHYS,
                               CONFIG_SYS_PCIE3_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -239,11 +238,11 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
  {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep = (host_agent == 5);
        int pcie_configured  = (io_sel == 2 || io_sel == 3
                                || io_sel == 5 || io_sel == 7);
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE1 connected to Slot1 as %s (base address %x)",
@@ -256,36 +255,31 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_IO_BASE,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE1_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE2,
                               CONFIG_SYS_PCIE1_MEM_PHYS2,
                               CONFIG_SYS_PCIE1_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
 
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -308,10 +302,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE2
  {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie2_hose;
        int pcie_ep = (host_agent == 3);
        int pcie_configured  = (io_sel == 5 || io_sel == 7);
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE2 connected to Slot 2 as %s (base address %x)",
@@ -324,36 +318,31 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE2_MEM_BASE,
                               CONFIG_SYS_PCIE2_MEM_PHYS,
                               CONFIG_SYS_PCIE2_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE2_IO_BASE,
                               CONFIG_SYS_PCIE2_IO_PHYS,
                               CONFIG_SYS_PCIE2_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE2_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE2_MEM_BASE2,
                               CONFIG_SYS_PCIE2_MEM_PHYS2,
                               CONFIG_SYS_PCIE2_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -375,8 +364,8 @@ pci_init_board(void)
 #ifdef CONFIG_PCI1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
+       struct pci_region *r = hose->regions;
 
        uint pci_agent = (host_agent == 6);
        uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */
@@ -397,35 +386,31 @@ pci_init_board(void)
                        );
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_MEM_BASE,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_IO_BASE,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+
 #ifdef CONFIG_SYS_PCI1_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_MEM_BASE2,
                               CONFIG_SYS_PCI1_MEM_PHYS2,
                               CONFIG_SYS_PCI1_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -660,45 +645,24 @@ int board_eth_init(bd_t *bis)
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
-       int node, tmp[2];
-       const char *path;
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
 
+void ft_board_setup(void *blob, bd_t *bd)
+{
        ft_cpu_setup(blob, bd);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #ifdef CONFIG_PCI1
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCIE2
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
 #endif
-#ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci2", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+#ifdef CONFIG_PCIE2
+       ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
 #endif
-#ifdef CONFIG_PCIE3
-               path = fdt_getprop(blob, node, "pci3", NULL);
-               if (path) {
-                       tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+#ifdef CONFIG_PCIE1
+       ft_fsl_pci_setup(blob, "pci3", &pcie3_hose);
 #endif
-       }
 }
 #endif

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 826180c2d41a41fd5ec0b530e584ef2eb3857ad1..600d606db3131b797b4738839e4e847de25aa3cb 100644 (file)
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -103,6 +103,9 @@ static struct pci_controller pcie2_hose;
 static struct pci_controller pcie3_hose;
 #endif
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 int first_free_busno=0;
 
 void
@@ -126,10 +129,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE3
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie3_hose;
        int pcie_ep = (host_agent == 1);
        int pcie_configured  = io_sel >= 1;
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE3 connected to ULI as %s (base address %x)",
@@ -142,36 +145,31 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE3_MEM_BASE,
                               CONFIG_SYS_PCIE3_MEM_PHYS,
                               CONFIG_SYS_PCIE3_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE3_IO_BASE,
                               CONFIG_SYS_PCIE3_IO_PHYS,
                               CONFIG_SYS_PCIE3_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE3_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE3_MEM_BASE2,
                               CONFIG_SYS_PCIE3_MEM_PHYS2,
                               CONFIG_SYS_PCIE3_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -198,10 +196,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
  {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep = (host_agent == 5);
        int pcie_configured  = io_sel & 6;
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE1 connected to Slot2 as %s (base address %x)",
@@ -214,36 +212,31 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_IO_BASE,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE1_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE2,
                               CONFIG_SYS_PCIE1_MEM_PHYS2,
                               CONFIG_SYS_PCIE1_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
 
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -266,10 +259,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE2
  {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie2_hose;
        int pcie_ep = (host_agent == 3);
        int pcie_configured  = io_sel & 4;
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE2 connected to Slot 1 as %s (base address %x)",
@@ -282,36 +275,31 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE2_MEM_BASE,
                               CONFIG_SYS_PCIE2_MEM_PHYS,
                               CONFIG_SYS_PCIE2_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE2_IO_BASE,
                               CONFIG_SYS_PCIE2_IO_PHYS,
                               CONFIG_SYS_PCIE2_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE2_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE2_MEM_BASE2,
                               CONFIG_SYS_PCIE2_MEM_PHYS2,
                               CONFIG_SYS_PCIE2_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -333,8 +321,8 @@ pci_init_board(void)
 #ifdef CONFIG_PCI1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
+       struct pci_region *r = hose->regions;
 
        uint pci_agent = (host_agent == 6);
        uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */
@@ -355,35 +343,31 @@ pci_init_board(void)
                        );
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_MEM_BASE,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_IO_BASE,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+
 #ifdef CONFIG_SYS_PCIE3_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE3_MEM_BASE2,
                               CONFIG_SYS_PCIE3_MEM_PHYS2,
                               CONFIG_SYS_PCIE3_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -503,46 +487,25 @@ int board_eth_init(bd_t *bis)
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
 
-void
-ft_board_setup(void *blob, bd_t *bd)
+void ft_board_setup(void *blob, bd_t *bd)
 {
-       int node, tmp[2];
-       const char *path;
-
        ft_cpu_setup(blob, bd);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
+
 #ifdef CONFIG_PCI1
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCIE2
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci2", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci2", &pcie3_hose);
 #endif
 #ifdef CONFIG_PCIE3
-               path = fdt_getprop(blob, node, "pci3", NULL);
-               if (path) {
-                       tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci3", &pcie2_hose);
 #endif
-       }
 }
 #endif

diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 875628dc90585792c0ab1bbda2ed82db03d88475..6eb62eab3b1380c0afd86b3ee43dbbe4d61cc983 100644 (file)
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -285,6 +285,9 @@ static struct pci_controller pci2_hose;
 static struct pci_controller pcie1_hose;
 #endif /* CONFIG_PCIE1 */
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 int first_free_busno=0;
 
 void
@@ -298,9 +301,9 @@ pci_init_board(void)
 #ifdef CONFIG_PCI1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
        struct pci_config_table *table;
+       struct pci_region *r = hose->regions;
 
        uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32;      /* PORDEVSR[15] */
        uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;       /* PORDEVSR[14] */
@@ -322,27 +325,22 @@ pci_init_board(void)
 
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
-
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_MEM_BASE,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_IO_BASE,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                /* relocate config table pointers */
                hose->config_table = \
@@ -393,9 +391,9 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3);
+       struct pci_region *r = hose->regions;
 
        int pcie_configured  = io_sel >= 1;
 
@@ -411,27 +409,23 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_IO_BASE,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -484,29 +478,16 @@ int last_stage_init(void)
 
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_pci_setup(void *blob, bd_t *bd)
-{
-       int node, tmp[2];
-       const char *path;
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
+void ft_pci_setup(void *blob, bd_t *bd)
+{
 #ifdef CONFIG_PCI1
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
 #endif
-       }
 }
 #endif

diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index eab1900e5c58858ee4c8b68d6da29c307b6ee245..28e3892e3da1d5cecab00c6858723a5dc1efa890 100644 (file)
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -323,6 +323,9 @@ static struct pci_controller pci1_hose = {
 static struct pci_controller pcie1_hose;
 #endif  /* CONFIG_PCIE1 */
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 int first_free_busno = 0;
 
 /*
@@ -380,8 +383,8 @@ pci_init_board(void)
        pib_init();
 
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
+       struct pci_region *r = hose->regions;
 
        uint pci_32 = 1;      /* PORDEVSR[15] */
        uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;       /* PORDEVSR[14] */
@@ -402,27 +405,23 @@ pci_init_board(void)
                        );
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                               CONFIG_SYS_PCI_MEMORY_BUS,
-                               CONFIG_SYS_PCI_MEMORY_PHYS,
-                               CONFIG_SYS_PCI_MEMORY_SIZE,
-                               PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                                CONFIG_SYS_PCI1_MEM_BASE,
                                CONFIG_SYS_PCI1_MEM_PHYS,
                                CONFIG_SYS_PCI1_MEM_SIZE,
                                PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                                CONFIG_SYS_PCI1_IO_BASE,
                                CONFIG_SYS_PCI1_IO_PHYS,
                                CONFIG_SYS_PCI1_IO_SIZE,
                                PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno = first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -441,9 +440,9 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3);
+       struct pci_region *r = hose->regions;
 
        int pcie_configured  = io_sel >= 1;
 
@@ -459,27 +458,23 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                               CONFIG_SYS_PCI_MEMORY_BUS,
-                               CONFIG_SYS_PCI_MEMORY_PHYS,
-                               CONFIG_SYS_PCI_MEMORY_SIZE,
-                               PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                                CONFIG_SYS_PCIE1_MEM_BASE,
                                CONFIG_SYS_PCIE1_MEM_PHYS,
                                CONFIG_SYS_PCIE1_MEM_SIZE,
                                PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                                CONFIG_SYS_PCIE1_IO_BASE,
                                CONFIG_SYS_PCIE1_IO_PHYS,
                                CONFIG_SYS_PCIE1_IO_SIZE,
                                PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -500,31 +495,18 @@ pci_init_board(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
-       int node, tmp[2];
-       const char *path;
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
 
+void ft_board_setup(void *blob, bd_t *bd)
+{
        ft_cpu_setup(blob, bd);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #ifdef CONFIG_PCI1
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
 #endif
-       }
 }
 #endif

diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index b2402dcc9fd59b1c73db1c8eb4936fbfd0ee731e..d1528a78e42c9055216824ed2a9e7cc9a9a97124 100644 (file)
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -147,6 +147,9 @@ static struct pci_controller pcie2_hose;
 static struct pci_controller pcie3_hose;
 #endif
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 int first_free_busno=0;
 #ifdef CONFIG_PCI
 void pci_init_board(void)
@@ -172,11 +175,11 @@ void pci_init_board(void)
 #ifdef CONFIG_PCIE3
        {
                volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
-               extern void fsl_pci_init(struct pci_controller *hose);
                struct pci_controller *hose = &pcie3_hose;
                int pcie_ep = (host_agent == 0) || (host_agent == 3) ||
                        (host_agent == 5) || (host_agent == 6);
                int pcie_configured  = io_sel >= 1;
+               struct pci_region *r = hose->regions;
                u32 temp32;
 
                if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
@@ -190,27 +193,23 @@ void pci_init_board(void)
                        printf ("\n");
 
                        /* inbound */
-                       pci_set_region(hose->regions + 0,
-                                       CONFIG_SYS_PCI_MEMORY_BUS,
-                                       CONFIG_SYS_PCI_MEMORY_PHYS,
-                                       CONFIG_SYS_PCI_MEMORY_SIZE,
-                                       PCI_REGION_MEM | PCI_REGION_MEMORY);
+                       r += fsl_pci_setup_inbound_windows(r);
 
                        /* outbound memory */
-                       pci_set_region(hose->regions + 1,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE3_MEM_BASE,
                                        CONFIG_SYS_PCIE3_MEM_PHYS,
                                        CONFIG_SYS_PCIE3_MEM_SIZE,
                                        PCI_REGION_MEM);
 
                        /* outbound io */
-                       pci_set_region(hose->regions + 2,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE3_IO_BASE,
                                        CONFIG_SYS_PCIE3_IO_PHYS,
                                        CONFIG_SYS_PCIE3_IO_SIZE,
                                        PCI_REGION_IO);
 
-                       hose->region_count = 3;
+                       hose->region_count = r - hose->regions;
                        hose->first_busno=first_free_busno;
                        pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -244,11 +243,11 @@ void pci_init_board(void)
 #ifdef CONFIG_PCIE2
        {
                volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
-               extern void fsl_pci_init(struct pci_controller *hose);
                struct pci_controller *hose = &pcie2_hose;
                int pcie_ep = (host_agent == 2) || (host_agent == 4) ||
                        (host_agent == 6) || (host_agent == 0);
                int pcie_configured  = io_sel & 4;
+               struct pci_region *r = hose->regions;
 
                if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                        printf ("\n    PCIE2 connected to Slot 1 as %s (base address %x)",
@@ -261,27 +260,23 @@ void pci_init_board(void)
                        printf ("\n");
 
                        /* inbound */
-                       pci_set_region(hose->regions + 0,
-                                       CONFIG_SYS_PCI_MEMORY_BUS,
-                                       CONFIG_SYS_PCI_MEMORY_PHYS,
-                                       CONFIG_SYS_PCI_MEMORY_SIZE,
-                                       PCI_REGION_MEM | PCI_REGION_MEMORY);
+                       r += fsl_pci_setup_inbound_windows(r);
 
                        /* outbound memory */
-                       pci_set_region(hose->regions + 1,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE2_MEM_BASE,
                                        CONFIG_SYS_PCIE2_MEM_PHYS,
                                        CONFIG_SYS_PCIE2_MEM_SIZE,
                                        PCI_REGION_MEM);
 
                        /* outbound io */
-                       pci_set_region(hose->regions + 2,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE2_IO_BASE,
                                        CONFIG_SYS_PCIE2_IO_PHYS,
                                        CONFIG_SYS_PCIE2_IO_SIZE,
                                        PCI_REGION_IO);
 
-                       hose->region_count = 3;
+                       hose->region_count = r - hose->regions;
                        hose->first_busno=first_free_busno;
                        pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -301,11 +296,11 @@ void pci_init_board(void)
 #ifdef CONFIG_PCIE1
        {
                volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-               extern void fsl_pci_init(struct pci_controller *hose);
                struct pci_controller *hose = &pcie1_hose;
                int pcie_ep = (host_agent <= 1) || (host_agent == 4) ||
                        (host_agent == 5);
                int pcie_configured  = io_sel & 6;
+               struct pci_region *r = hose->regions;
 
                if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                        printf ("\n    PCIE1 connected to Slot 2 as %s (base address %x)",
@@ -318,27 +313,23 @@ void pci_init_board(void)
                        printf ("\n");
 
                        /* inbound */
-                       pci_set_region(hose->regions + 0,
-                                       CONFIG_SYS_PCI_MEMORY_BUS,
-                                       CONFIG_SYS_PCI_MEMORY_PHYS,
-                                       CONFIG_SYS_PCI_MEMORY_SIZE,
-                                       PCI_REGION_MEM | PCI_REGION_MEMORY);
+                       r += fsl_pci_setup_inbound_windows(r);
 
                        /* outbound memory */
-                       pci_set_region(hose->regions + 1,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE1_MEM_BASE,
                                        CONFIG_SYS_PCIE1_MEM_PHYS,
                                        CONFIG_SYS_PCIE1_MEM_SIZE,
                                        PCI_REGION_MEM);
 
                        /* outbound io */
-                       pci_set_region(hose->regions + 2,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE1_IO_BASE,
                                        CONFIG_SYS_PCIE1_IO_PHYS,
                                        CONFIG_SYS_PCIE1_IO_SIZE,
                                        PCI_REGION_IO);
 
-                       hose->region_count = 3;
+                       hose->region_count = r - hose->regions;
                        hose->first_busno=first_free_busno;
 
                        pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -568,10 +559,11 @@ int board_eth_init(bd_t *bis)
 #endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
+
 void ft_board_setup(void *blob, bd_t *bd)
 {
-       int node, tmp[2];
-       const char *path;
        ulong base, size;
 
        ft_cpu_setup(blob, bd);
@@ -581,31 +573,15 @@ void ft_board_setup(void *blob, bd_t *bd)
 
        fdt_fixup_memory(blob, (u64)base, (u64)size);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #ifdef CONFIG_PCIE3
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pcie3_hose);
 #endif
 #ifdef CONFIG_PCIE2
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci2", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
 #endif
-       }
 }
 #endif
 

diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 21f82f2837a8b273aa887de6bbd6459578bbafdb..e27c92dd71830b18815abb910d3af80877039ed1 100644 (file)
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -364,6 +364,9 @@ static struct pci_controller pcie1_hose;
 
 int first_free_busno=0;
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 void
 pci_init_board(void)
 {
@@ -372,9 +375,9 @@ pci_init_board(void)
 #ifdef CONFIG_PCI1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
        struct pci_config_table *table;
+       struct pci_region *r = hose->regions;
 
        uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32;      /* PORDEVSR[15] */
        uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;       /* PORDEVSR[14] */
@@ -396,27 +399,22 @@ pci_init_board(void)
 
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
-
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_MEM_BASE,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_IO_BASE,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                /* relocate config table pointers */
                hose->config_table = \
@@ -467,9 +465,9 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3);
+       struct pci_region *r = hose->regions;
 
        int pcie_configured  = io_sel >= 1;
 
@@ -485,27 +483,27 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI_MEMORY_BUS,
                               CONFIG_SYS_PCI_MEMORY_PHYS,
                               CONFIG_SYS_PCI_MEMORY_SIZE,
                               PCI_REGION_MEM | PCI_REGION_MEMORY);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_IO_BASE,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -531,41 +529,17 @@ int last_stage_init(void)
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_pci_setup(void *blob, bd_t *bd)
-{
-       int node, tmp[2];
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
+void ft_board_setup(void *blob, bd_t *bd)
+{
+       ft_cpu_setup(blob, bd);
 #ifdef CONFIG_PCI1
-               const char *path;
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               const char *path;
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
-#endif
-       }
-}
-#endif
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
-       ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI
-       ft_pci_setup(blob, bd);
+       ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
 #endif
 }
 #endif

diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c
index 1f309bbc61fc6b00a3fb56e0d820bb9b37e311ce..97d49eae0b56faee8e7d965bc8a7c2c658cd10d3 100644 (file)
--- a/board/tqc/tqm85xx/tqm85xx.c
+++ b/board/tqc/tqm85xx/tqm85xx.c
@@ -538,6 +538,9 @@ void local_bus_init (void)
  */
 static int first_free_busno;
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 #if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
 static struct pci_controller pci1_hose;
 #endif /* CONFIG_PCI || CONFIG_PCI1 */
@@ -552,8 +555,8 @@ static inline void init_pci1(void)
 #if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
        uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
+       struct pci_region *r = hose->regions;
 
        /* PORDEVSR[15] */
        uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32;
@@ -578,28 +581,23 @@ static inline void init_pci1(void)
 
 
                /* inbound */
-               pci_set_region (hose->regions + 0,
-                               CONFIG_SYS_PCI_MEMORY_BUS,
-                               CONFIG_SYS_PCI_MEMORY_PHYS,
-                               CONFIG_SYS_PCI_MEMORY_SIZE,
-                               PCI_REGION_MEM | PCI_REGION_MEMORY);
-
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region (hose->regions + 1,
+               pci_set_region (r++,
                                CONFIG_SYS_PCI1_MEM_BASE,
                                CONFIG_SYS_PCI1_MEM_PHYS,
                                CONFIG_SYS_PCI1_MEM_SIZE,
                                PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region (hose->regions + 2,
+               pci_set_region (r++,
                                CONFIG_SYS_PCI1_IO_BASE,
                                CONFIG_SYS_PCI1_IO_PHYS,
                                CONFIG_SYS_PCI1_IO_SIZE,
                                PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno = first_free_busno;
                pci_setup_indirect (hose, (int)&pci->cfg_addr,
@@ -641,10 +639,10 @@ static inline void init_pcie1(void)
        uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
        uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) ||
                (host_agent == 3);
+       struct pci_region *r = hose->regions;
 
        int pcie_configured  = io_sel >= 1;
 
@@ -660,27 +658,23 @@ static inline void init_pcie1(void)
                puts ("\n");
 
                /* inbound */
-               pci_set_region (hose->regions + 0,
-                               CONFIG_SYS_PCI_MEMORY_BUS,
-                               CONFIG_SYS_PCI_MEMORY_PHYS,
-                               CONFIG_SYS_PCI_MEMORY_SIZE,
-                               PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region (hose->regions + 1,
+               pci_set_region (r++,
                                CONFIG_SYS_PCIE1_MEM_BASE,
                                CONFIG_SYS_PCIE1_MEM_PHYS,
                                CONFIG_SYS_PCIE1_MEM_SIZE,
                                PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region (hose->regions + 2,
+               pci_set_region (r++,
                                CONFIG_SYS_PCIE1_IO_BASE,
                                CONFIG_SYS_PCIE1_IO_PHYS,
                                CONFIG_SYS_PCIE1_IO_SIZE,
                                PCI_REGION_IO);
 
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
 
                hose->first_busno = first_free_busno;
                pci_setup_indirect(hose, (int)&pci->cfg_addr,
@@ -707,31 +701,19 @@ void pci_init_board (void)
 }
 
 #ifdef CONFIG_OF_BOARD_SETUP
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
+
 void ft_board_setup (void *blob, bd_t *bd)
 {
-       int node, tmp[2];
-       const char *path;
-
        ft_cpu_setup (blob, bd);
 
-       node = fdt_path_offset (blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
-               path = fdt_getprop (blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path (blob, path, "bus-range", &tmp, 8, 1);
-               }
-#endif /* CONFIG_PCI || CONFIG_PCI1 */
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
+#endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop (blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path (blob, path, "bus-range", &tmp, 8, 1);
-               }
-#endif /* CONFIG_PCIE1 */
-       }
+       ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
+#endif
 }
 #endif /* CONFIG_OF_BOARD_SETUP */
 

diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index 2450adb7d31e2d39641e6922fec9e8f861601d3c..1b745265dcbaa4ce33c5e975d9e5037dde1099dd 100644 (file)
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -287,11 +287,6 @@
 
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_TSEC_ENET)

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index a1b38c73fe2ff8aa041b751c7124588d2a40ff86..c4389cc44654deb41edc8e65385db72222bcd261 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -307,11 +307,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 #define CONFIG_SYS_PCI1_MEM_BASE       0x80000000
 #define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BASE
 #define CONFIG_SYS_PCI1_MEM_SIZE       0x10000000      /* 256M */

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index c47374acb6a1790f8736fa04c1c456f6f3e549da..cdbbea60d66c0ad17adada714a93f7ac97d16b14 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -276,11 +276,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_PCI1_IO_PHYS        0xe1000000
 #define CONFIG_SYS_PCI1_IO_SIZE        0x00010000      /* 64k */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 /* controller 2, Slot 1, tgtid 1, Base address 9000 */
 #define CONFIG_SYS_PCIE2_MEM_BASE      0x80000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS      CONFIG_SYS_PCIE2_MEM_BASE

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index b67de56e6f8ba99501494049a7a66e64889c7196..083afba9a3073f27bc2f3b721425832970701cda 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -420,11 +420,6 @@ extern unsigned long get_clock_freq(void);
 
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 #endif /* CONFIG_PCI */
 
 

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index c4d4374fe86333e27c8ee543b9967357b74a9367..ab3e6d69482e115967d04edf86f0f0cd8afa7677 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -389,11 +389,6 @@ extern unsigned long get_clock_freq(void);
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057  /* Motorola */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 #endif /* CONFIG_PCI */
 
 #ifndef CONFIG_NET_MULTI

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 0493e66b2dd233de0f1a25c4bc6b1bf92010c100..eefb06c67aafb536bebbc4f1f4fe800f403eb3f5 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -326,11 +326,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 /* controller 3, direct to uli, tgtid 3, Base address 8000 */
 #define CONFIG_SYS_PCIE3_MEM_BASE      0x80000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      CONFIG_SYS_PCIE3_MEM_BASE

diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index b05f43d5600da947dd0005a6e6bc3615330457ea..2d4048a92835fc1cec8f095cac68a2982adcde80 100644 (file)
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -403,11 +403,6 @@
 #define CONFIG_SYS_PCI1_IO_PHYS        CONFIG_SYS_PCI1_IO_BASE
 #define CONFIG_SYS_PCI1_IO_SIZE        0x1000000       /*  16M                 */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 #ifdef CONFIG_PCIE1
 /*
  * General PCI express

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 54f3e66cee2e99f9b0471ad395a2ae6e79a3e688..aefd30a1ede2869ba0277b6b01c9c4156e205550 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -387,11 +387,6 @@
 
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
 
-/* PCI view of System Memory */
-#define CONFIG_SYS_PCI_MEMORY_BUS      0x00000000
-#define CONFIG_SYS_PCI_MEMORY_PHYS     0x00000000
-#define CONFIG_SYS_PCI_MEMORY_SIZE     0x80000000
-
 #endif /* CONFIG_PCI */