]> git.sur5r.net Git - u-boot/commitdiff
Fix compiler warning in mpc8xxx ddr code
authorKumar Gala <galak@kernel.crashing.org>
Fri, 5 Sep 2008 19:40:29 +0000 (14:40 -0500)
committerWolfgang Denk <wd@denx.de>
Sat, 6 Sep 2008 23:26:13 +0000 (01:26 +0200)
ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
ctrl_regs.c:523: warning: 'caslat' may be used uninitialized in this function
ctrl_regs.c:523: note: 'caslat' was declared here

Add a warning in DDR1 case if cas_latency isn't a value we know about.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
cpu/mpc8xxx/ddr/ctrl_regs.c

index ca675512a29633004fb84b639b7f150f6b3fb8fd..e6c2a5ce7cf03bc77d659c904c894cbad048eba9 100644 (file)
@@ -520,7 +520,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
        unsigned int wr;        /* Write Recovery */
        unsigned int dll_res;   /* DLL Reset */
        unsigned int mode;      /* Normal=0 or Test=1 */
-       unsigned int caslat;    /* CAS# latency */
+       unsigned int caslat = 0;/* CAS# latency */
        /* BT: Burst Type (0=Sequential, 1=Interleaved) */
        unsigned int bt;
        unsigned int bl;        /* BL: Burst Length */
@@ -572,7 +572,9 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
                        0x6,    /* 2.5 clocks */
                        0x3     /* 3.0 clocks */
                };
-       caslat = mode_caslat_table[cas_latency - 1];
+               caslat = mode_caslat_table[cas_latency - 1];
+       } else {
+               printf("Warning: unknown cas_latency %d\n", cas_latency);
        }
 #elif defined(CONFIG_FSL_DDR2)
        caslat = cas_latency;