]> git.sur5r.net Git - u-boot/commitdiff
powerpc/mpc85xx: SECURE BOOT- corrected CSPR settings for BSC9132QDS NAND
authorAneesh Bansal <aneesh.bansal@freescale.com>
Wed, 14 May 2014 06:15:15 +0000 (11:45 +0530)
committerYork Sun <yorksun@freescale.com>
Fri, 16 May 2014 21:24:27 +0000 (16:24 -0500)
In case of secure boot from NAND, CSPR and FTIM settings are
same as non-secure NAND boot. CSPR0 is configured as NAND and
CSPR1 is configured as NOR.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
include/configs/BSC9132QDS.h

index e76a04b26253f48f608e87542037e13ec32f38dd..7bb5d33d0cc974a0fe82c9738bf897d060533994 100644 (file)
@@ -360,7 +360,7 @@ combinations. this should be removed later
 #endif
 
 /* Set up IFC registers for boot location NOR/NAND */
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT)
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK0              CONFIG_SYS_NAND_AMASK
 #define CONFIG_SYS_CSOR0               CONFIG_SYS_NAND_CSOR