int checkboard(void)
{
- puts("Board: Matrix Vision mvBlueLYNX-M7 " MV_VERSION "\n");
+ puts("Board: Matrix Vision mvBlueLYNX-M7\n");
return 0;
}
char buf[32];
int i;
-#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
const struct cpu_type {
char name[15];
u32 partid;
/* System General Purpose Register */
#ifdef CFG_SICRH
+#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313)
+ /* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */
+ im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CFG_SICRH;
+#else
im->sysconf.sicrh = CFG_SICRH;
#endif
+#endif
#ifdef CFG_SICRL
im->sysconf.sicrl = CFG_SICRL;
#endif
struct cpu_type *identify_cpu(u32 ver);
+#if defined(CONFIG_MPC85xx)
#define CPU_TYPE_ENTRY(n, v) \
{ .name = #n, .soc_ver = SVR_##v, }
+#else
+#if defined(CONFIG_MPC83XX)
+#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
+#endif
+#endif
+
#ifndef CONFIG_MACH_SPECIFIC
extern int _machine;
#ifndef __CONFIG_H
#define __CONFIG_H
-#define MV_VERSION "v1.0.1"
+#include <version.h>
/*
* High Level Configuration Options
#define CFG_HID0_FINAL CFG_HID0_INIT
#define CFG_HID2 HID2_HBE
+#define CONFIG_HIGH_BATS 1
/* DDR */
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
"mv_dtb_addr=" MV_DTB_ADDR "\0" \
"mv_dtb_addr_ram=" MV_DTB_ADDR_RAM "\0" \
"dtb_name=" MV_DTB_NAME "\0" \
- "mv_version=" MV_VERSION "\0" \
+ "mv_version=" U_BOOT_VERSION "\0" \
"dhcp_client_id=" MV_CI "\0" \
"dhcp_vendor-class-identifier=" MV_VCI "\0" \
"netretry=no\0" \