]> git.sur5r.net Git - u-boot/commitdiff
ARM: tegra: add DWC EQoS (ethernet) to Tegra186 DT
authorStephen Warren <swarren@nvidia.com>
Mon, 12 Sep 2016 17:51:14 +0000 (11:51 -0600)
committerJoe Hershberger <joe.hershberger@ni.com>
Mon, 7 Nov 2016 17:28:16 +0000 (11:28 -0600)
Tegra186 includes a Synopsys DWC EQoS (Ethernet) device. Add this to the
Tegra186 SoC DT so that boards can make use of it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
arch/arm/dts/tegra186.dtsi

index f878b65325101859b7205ebc93a5cacead2194f2..dd9e3b869de716c43bcb8f559207adfbf2cb6ddb 100644 (file)
                #interrupt-cells = <2>;
        };
 
+       ethernet@2490000 {
+               compatible = "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10";
+               reg = <0x0 0x02490000 0x0 0x10000>;
+               interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,
+                       <&bpmp TEGRA186_CLK_EQOS_AXI>,
+                       <&bpmp TEGRA186_CLK_EQOS_RX>,
+                       <&bpmp TEGRA186_CLK_EQOS_PTP_REF>,
+                       <&bpmp TEGRA186_CLK_EQOS_TX>;
+               clock-names = "slave_bus",
+                       "master_bus",
+                       "rx",
+                       "ptp_ref",
+                       "tx";
+               resets = <&bpmp TEGRA186_RESET_EQOS>;
+               reset-names = "eqos";
+               phy-mode = "rgmii";
+               status = "disabled";
+       };
+
        uarta: serial@3100000 {
                compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
                reg = <0x0 0x03100000 0x0 0x10000>;